710 lines
27 KiB
C
710 lines
27 KiB
C
#include "../include/ide.h"
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#include "../include/printf.h"
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#include "../include/common.h"
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#include "../include/vdisk.h"
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#include "../include/timer.h"
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#include "../include/pci.h"
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static inline nul(char *f, ...) {}
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#define logk nul
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#define inb io_in8
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#define outb io_out8
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struct IDEChannelRegisters {
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unsigned short base; // I/O Base.
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unsigned short ctrl; // Control Base
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unsigned short bmide; // Bus Master IDE
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unsigned char nIEN; // nIEN (No Interrupt);
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} channels[2];
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struct ide_device {
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unsigned char Reserved; // 0 (Empty) or 1 (This Drive really exists).
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unsigned char Channel; // 0 (Primary Channel) or 1 (Secondary Channel).
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unsigned char Drive; // 0 (Master Drive) or 1 (Slave Drive).
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unsigned short Type; // 0: ATA, 1:ATAPI.
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unsigned short Signature; // Drive Signature
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unsigned short Capabilities; // Features.
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unsigned int CommandSets; // Command Sets Supported.
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unsigned int Size; // Size in Sectors.
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unsigned char Model[41]; // Model in string.
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} ide_devices[4];
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unsigned char ide_buf[2048] = {0};
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volatile unsigned static char ide_irq_invoked = 0;
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unsigned static char atapi_packet[12] = {0xA8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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static int package[2];
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static inline void insl(uint32_t port, uint32_t *addr, int cnt) {
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asm volatile("cld;"
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"repne; insl;"
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: "=D"(addr), "=c"(cnt)
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: "d"(port), "0"(addr), "1"(cnt)
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: "memory", "cc");
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}
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static void Read(char drive, unsigned char *buffer, unsigned int number,
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unsigned int lba) {
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ide_read_sectors(drive - 'A', number, lba, 1 * 8, buffer);
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}
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static void Write(char drive, unsigned char *buffer, unsigned int number,
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unsigned int lba) {
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ide_write_sectors(drive - 'A', number, lba, 1 * 8, buffer);
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}
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void ide_initialize(unsigned int BAR0, unsigned int BAR1, unsigned int BAR2,
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unsigned int BAR3, unsigned int BAR4) {
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int j, k, count = 0;
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for (int i = 0; i < 4; i++) {
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ide_devices[i].Reserved = 0;
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}
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// 1- Detect I/O Ports which interface IDE Controller:
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channels[ATA_PRIMARY].base = (BAR0 & 0xFFFFFFFC) + 0x1F0 * (!BAR0);
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channels[ATA_PRIMARY].ctrl = (BAR1 & 0xFFFFFFFC) + 0x3F6 * (!BAR1);
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channels[ATA_SECONDARY].base = (BAR2 & 0xFFFFFFFC) + 0x170 * (!BAR2);
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channels[ATA_SECONDARY].ctrl = (BAR3 & 0xFFFFFFFC) + 0x376 * (!BAR3);
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channels[ATA_PRIMARY].bmide = (BAR4 & 0xFFFFFFFC) + 0; // Bus Master IDE
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channels[ATA_SECONDARY].bmide = (BAR4 & 0xFFFFFFFC) + 8; // Bus Master IDE
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// 2- Disable IRQs:
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ide_write(ATA_PRIMARY, ATA_REG_CONTROL, 2);
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ide_write(ATA_SECONDARY, ATA_REG_CONTROL, 2);
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logk("w1\n");
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// 3- Detect ATA-ATAPI Devices:
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for (int i = 0; i < 2; i++)
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for (j = 0; j < 2; j++) {
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unsigned char err = 0, type = IDE_ATA, status;
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ide_devices[count].Reserved = 0; // Assuming that no drive here.
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// (I) Select Drive:
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ide_write(i, ATA_REG_HDDEVSEL, 0xA0 | (j << 4)); // Select Drive.
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sleep(1); // Wait 1ms for drive select to work.
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logk("I\n");
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// (II) Send ATA Identify Command:
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ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY);
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sleep(1); // This function should be implemented in your OS. which waits
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// for 1 ms. it is based on System Timer Device Driver.
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logk("II\n");
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// (III) Polling:
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if (ide_read(i, ATA_REG_STATUS) == 0)
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continue; // If Status = 0, No Device.
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logk("III\n");
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while (1) {
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logk("read ide....\n");
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status = ide_read(i, ATA_REG_STATUS);
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logk("read ok\n");
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if ((status & ATA_SR_ERR)) {
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err = 1;
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break;
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} // If Err, Device is not ATA.
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if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRQ))
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break; // Everything is right.
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}
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// (IV) Probe for ATAPI Devices:
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logk("IV\n");
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if (err != 0) {
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unsigned char cl = ide_read(i, ATA_REG_LBA1);
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unsigned char ch = ide_read(i, ATA_REG_LBA2);
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if (cl == 0x14 && ch == 0xEB)
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type = IDE_ATAPI;
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else if (cl == 0x69 && ch == 0x96)
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type = IDE_ATAPI;
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else
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continue; // Unknown Type (may not be a device).
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ide_write(i, ATA_REG_COMMAND, ATA_CMD_IDENTIFY_PACKET);
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sleep(1);
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}
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// (V) Read Identification Space of the Device:
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logk("V\n");
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ide_read_buffer(i, ATA_REG_DATA, (unsigned int) ide_buf, 128);
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// (VI) Read Device Parameters:
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logk("VI\n");
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ide_devices[count].Reserved = 1;
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ide_devices[count].Type = type;
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ide_devices[count].Channel = i;
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ide_devices[count].Drive = j;
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ide_devices[count].Signature =
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*((unsigned short *) (ide_buf + ATA_IDENT_DEVICETYPE));
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ide_devices[count].Capabilities =
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*((unsigned short *) (ide_buf + ATA_IDENT_CAPABILITIES));
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ide_devices[count].CommandSets =
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*((unsigned int *) (ide_buf + ATA_IDENT_COMMANDSETS));
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// (VII) Get Size:
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logk("VII\n");
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if (ide_devices[count].CommandSets & (1 << 26))
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// Device uses 48-Bit Addressing:
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ide_devices[count].Size =
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*((unsigned int *) (ide_buf + ATA_IDENT_MAX_LBA_EXT));
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else
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// Device uses CHS or 28-bit Addressing:
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ide_devices[count].Size =
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*((unsigned int *) (ide_buf + ATA_IDENT_MAX_LBA));
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// (VIII) String indicates model of device (like Western Digital HDD and
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// SONY DVD-RW...):
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logk("VIII\n");
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for (k = 0; k < 40; k += 2) {
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ide_devices[count].Model[k] = ide_buf[ATA_IDENT_MODEL + k + 1];
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ide_devices[count].Model[k + 1] = ide_buf[ATA_IDENT_MODEL + k];
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}
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ide_devices[count].Model[40] = 0; // Terminate String.
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count++;
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}
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// 4- Print Summary:
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vdisk vd;
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for (int i = 0; i < 4; i++)
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if (ide_devices[i].Reserved == 1) {
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logk(" %d Found %s Drive %dMB - %s\n", i,
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(const char *[]) {"ATA", "ATAPI"}[ide_devices[i].Type], /* Type */
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ide_devices[i].Size / 1024 / 2, /* Size */
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ide_devices[i].Model);
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strcpy(vd.DriveName, ide_devices[i].Model);
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vd.flag = 1;
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vd.Read = Read;
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vd.Write = Write;
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vd.size = ide_devices[i].Size;
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printf("[Disk-(%c)]: Size: %dMB | Name: %s\n", register_vdisk(vd), vd.size, vd.DriveName);
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}
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}
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unsigned char ide_read(unsigned char channel, unsigned char reg) {
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unsigned char result;
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
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if (reg < 0x08)
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result = inb(channels[channel].base + reg - 0x00);
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else if (reg < 0x0C)
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result = inb(channels[channel].base + reg - 0x06);
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else if (reg < 0x0E)
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result = inb(channels[channel].ctrl + reg - 0x0A);
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else if (reg < 0x16)
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result = inb(channels[channel].bmide + reg - 0x0E);
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
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return result;
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}
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void ide_write(unsigned char channel, unsigned char reg, unsigned char data) {
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
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if (reg < 0x08)
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outb(channels[channel].base + reg - 0x00, data);
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else if (reg < 0x0C)
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outb(channels[channel].base + reg - 0x06, data);
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else if (reg < 0x0E)
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outb(channels[channel].ctrl + reg - 0x0A, data);
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else if (reg < 0x16)
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outb(channels[channel].bmide + reg - 0x0E, data);
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
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}
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void ide_read_buffer(unsigned char channel, unsigned char reg,
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unsigned int buffer, unsigned int quads) {
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/* WARNING: This code contains a serious bug. The inline assembly trashes ES
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* and ESP for all of the code the compiler generates between the inline
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* assembly blocks.
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*/
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
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// asm("pushw %es; movw %ds, %ax; movw %ax, %es");
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if (reg < 0x08)
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insl(channels[channel].base + reg - 0x00, buffer, quads);
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else if (reg < 0x0C)
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insl(channels[channel].base + reg - 0x06, buffer, quads);
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else if (reg < 0x0E)
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insl(channels[channel].ctrl + reg - 0x0A, buffer, quads);
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else if (reg < 0x16)
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insl(channels[channel].bmide + reg - 0x0E, buffer, quads);
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// asm("popw %es;");
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if (reg > 0x07 && reg < 0x0C)
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ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN);
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}
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unsigned char ide_polling(unsigned char channel, unsigned int advanced_check) {
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// (I) Delay 400 nanosecond for BSY to be set:
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// -------------------------------------------------
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for (int i = 0; i < 4; i++)
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ide_read(channel, ATA_REG_ALTSTATUS); // Reading the Alternate Status port
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// wastes 100ns; loop four times.
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// (II) Wait for BSY to be cleared:
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// -------------------------------------------------
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logk("II\n");
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int a = ide_read(channel, ATA_REG_STATUS);
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while (a & ATA_SR_BSY) {
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logk("a=%d\n", a & ATA_SR_BSY); // Wait for BSY to be zero.
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a = ide_read(channel, ATA_REG_STATUS);
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sleep(1);
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}
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logk("II OK\n");
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if (advanced_check) {
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unsigned char state =
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ide_read(channel, ATA_REG_STATUS); // Read Status Register.
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// (III) Check For Errors:
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// -------------------------------------------------
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logk("III\n");
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if (state & ATA_SR_ERR)
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return 2; // Error.
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// (IV) Check If Device fault:
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// -------------------------------------------------
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if (state & ATA_SR_DF)
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return 1; // Device Fault.
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// (V) Check DRQ:
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// -------------------------------------------------
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// BSY = 0; DF = 0; ERR = 0 so we should check for DRQ now.
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if ((state & ATA_SR_DRQ) == 0)
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return 3; // DRQ should be set
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}
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return 0; // No Error.
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}
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unsigned char ide_print_error(unsigned int drive, unsigned char err) {
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if (err == 0)
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return err;
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printk("IDE:");
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if (err == 1) {
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printk("- Device Fault\n ");
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err = 19;
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} else if (err == 2) {
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unsigned char st = ide_read(ide_devices[drive].Channel, ATA_REG_ERROR);
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if (st & ATA_ER_AMNF) {
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printk("- No Address Mark Found\n ");
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err = 7;
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}
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if (st & ATA_ER_TK0NF) {
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printk("- No Media or Media Error\n ");
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err = 3;
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}
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if (st & ATA_ER_ABRT) {
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printk("- Command Aborted\n ");
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err = 20;
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}
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if (st & ATA_ER_MCR) {
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printk("- No Media or Media Error\n ");
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err = 3;
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}
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if (st & ATA_ER_IDNF) {
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printk("- ID mark not Found\n ");
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err = 21;
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}
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if (st & ATA_ER_MC) {
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printk("- No Media or Media Error\n ");
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err = 3;
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}
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if (st & ATA_ER_UNC) {
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printk("- Uncorrectable Data Error\n ");
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err = 22;
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}
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if (st & ATA_ER_BBK) {
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printk("- Bad Sectors\n ");
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err = 13;
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}
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} else if (err == 3) {
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printk("- Reads Nothing\n ");
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err = 23;
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} else if (err == 4) {
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printk("- Write Protected\n ");
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err = 8;
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}
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printk(
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"- [%s %s] %s\n",
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(const char *[]) {
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"Primary",
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"Secondary"}[ide_devices[drive].Channel], // Use the channel as an
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// index into the array
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(const char *[]) {
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"Master",
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"Slave"}[ide_devices[drive].Drive], // Same as above, using the drive
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ide_devices[drive].Model);
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return err;
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}
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unsigned char ide_ata_access(unsigned char direction, unsigned char drive,
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unsigned int lba, unsigned char numsects,
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unsigned short selector, unsigned int edi) {
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unsigned char lba_mode /* 0: CHS, 1:LBA28, 2: LBA48 */,
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dma /* 0: No DMA, 1: DMA */, cmd;
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unsigned char lba_io[6];
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unsigned int channel = ide_devices[drive].Channel; // Read the Channel.
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unsigned int slavebit =
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ide_devices[drive].Drive; // Read the Drive [Master/Slave]
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unsigned int bus =
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channels[channel].base; // Bus Base, like 0x1F0 which is also data port.
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unsigned int words =
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256; // Almost every ATA drive has a sector-size of 512-byte.
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unsigned short cyl, i;
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unsigned char head, sect, err;
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ide_write(channel, ATA_REG_CONTROL,
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channels[channel].nIEN = (ide_irq_invoked = 0x0) + 0x02);
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// (I) Select one from LBA28, LBA48 or CHS;
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logk("I %02x\n", channels[channel].nIEN);
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if (lba >= 0x10000000) { // Sure Drive should support LBA in this case, or
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// you are giving a wrong LBA.
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// LBA48:
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lba_mode = 2;
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lba_io[0] = (lba & 0x000000FF) >> 0;
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lba_io[1] = (lba & 0x0000FF00) >> 8;
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lba_io[2] = (lba & 0x00FF0000) >> 16;
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lba_io[3] = (lba & 0xFF000000) >> 24;
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lba_io[4] = 0; // LBA28 is integer, so 32-bits are enough to access 2TB.
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lba_io[5] = 0; // LBA28 is integer, so 32-bits are enough to access 2TB.
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head = 0; // Lower 4-bits of HDDEVSEL are not used here.
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} else if (ide_devices[drive].Capabilities & 0x200) { // Drive supports LBA?
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// LBA28:
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lba_mode = 1;
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lba_io[0] = (lba & 0x00000FF) >> 0;
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lba_io[1] = (lba & 0x000FF00) >> 8;
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lba_io[2] = (lba & 0x0FF0000) >> 16;
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lba_io[3] = 0; // These Registers are not used here.
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lba_io[4] = 0; // These Registers are not used here.
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lba_io[5] = 0; // These Registers are not used here.
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head = (lba & 0xF000000) >> 24;
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} else {
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// CHS:
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lba_mode = 0;
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sect = (lba % 63) + 1;
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cyl = (lba + 1 - sect) / (16 * 63);
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lba_io[0] = sect;
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lba_io[1] = (cyl >> 0) & 0xFF;
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lba_io[2] = (cyl >> 8) & 0xFF;
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lba_io[3] = 0;
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lba_io[4] = 0;
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lba_io[5] = 0;
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head = (lba + 1 - sect) % (16 * 63) /
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(63); // Head number is written to HDDEVSEL lower 4-bits.
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}
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// (II) See if drive supports DMA or not;
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logk("II\n");
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dma = 0; // We don't support DMA
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// (III) Wait if the drive is busy;
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logk("III\n");
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while (ide_read(channel, ATA_REG_STATUS) & ATA_SR_BSY) {
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} // Wait if busy.
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// (IV) Select Drive from the controller;
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logk("IV\n");
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if (lba_mode == 0)
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ide_write(channel, ATA_REG_HDDEVSEL,
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0xA0 | (slavebit << 4) | head); // Drive & CHS.
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else
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ide_write(channel, ATA_REG_HDDEVSEL,
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0xE0 | (slavebit << 4) | head); // Drive & LBA
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// (V) Write Parameters;
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if (lba_mode == 2) {
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ide_write(channel, ATA_REG_SECCOUNT1, 0);
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ide_write(channel, ATA_REG_LBA3, lba_io[3]);
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ide_write(channel, ATA_REG_LBA4, lba_io[4]);
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ide_write(channel, ATA_REG_LBA5, lba_io[5]);
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}
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ide_write(channel, ATA_REG_SECCOUNT0, numsects);
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ide_write(channel, ATA_REG_LBA0, lba_io[0]);
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ide_write(channel, ATA_REG_LBA1, lba_io[1]);
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ide_write(channel, ATA_REG_LBA2, lba_io[2]);
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if (lba_mode == 0 && dma == 0 && direction == 0)
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cmd = ATA_CMD_READ_PIO;
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if (lba_mode == 1 && dma == 0 && direction == 0)
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cmd = ATA_CMD_READ_PIO;
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if (lba_mode == 2 && dma == 0 && direction == 0)
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cmd = ATA_CMD_READ_PIO_EXT;
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if (lba_mode == 0 && dma == 1 && direction == 0)
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cmd = ATA_CMD_READ_DMA;
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if (lba_mode == 1 && dma == 1 && direction == 0)
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cmd = ATA_CMD_READ_DMA;
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if (lba_mode == 2 && dma == 1 && direction == 0)
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cmd = ATA_CMD_READ_DMA_EXT;
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if (lba_mode == 0 && dma == 0 && direction == 1)
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cmd = ATA_CMD_WRITE_PIO;
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if (lba_mode == 1 && dma == 0 && direction == 1)
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cmd = ATA_CMD_WRITE_PIO;
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if (lba_mode == 2 && dma == 0 && direction == 1)
|
|
cmd = ATA_CMD_WRITE_PIO_EXT;
|
|
if (lba_mode == 0 && dma == 1 && direction == 1)
|
|
cmd = ATA_CMD_WRITE_DMA;
|
|
if (lba_mode == 1 && dma == 1 && direction == 1)
|
|
cmd = ATA_CMD_WRITE_DMA;
|
|
if (lba_mode == 2 && dma == 1 && direction == 1)
|
|
cmd = ATA_CMD_WRITE_DMA_EXT;
|
|
ide_write(channel, ATA_REG_COMMAND, cmd); // Send the Command.
|
|
logk("IV1\n");
|
|
if (dma)
|
|
if (direction == 0);
|
|
// DMA Read.
|
|
else;
|
|
// DMA Write.
|
|
else if (direction == 0) {
|
|
// PIO Read.
|
|
uint16_t *word_ = edi;
|
|
for (i = 0; i < numsects; i++) {
|
|
// printf("read %d\n", i);
|
|
if (err = ide_polling(channel, 1))
|
|
return err; // Polling, set error and exit if there is.
|
|
|
|
logk("words=%d bus=%d\n", words, bus);
|
|
for (int h = 0; h < words; h++) {
|
|
unsigned short a = io_in16(bus);
|
|
word_[i * words + h] = a;
|
|
// printf("%04x ",a);
|
|
}
|
|
//insl(bus, word_ + i * words, words / 2);
|
|
}
|
|
} else {
|
|
// PIO Write.
|
|
uint16_t *word_ = edi;
|
|
for (i = 0; i < numsects; i++) {
|
|
logk("write %d\n", i);
|
|
ide_polling(channel, 0); // Polling.
|
|
// asm("pushw %ds");
|
|
// asm("mov %%ax, %%ds" ::"a"(selector));
|
|
// asm("rep outsw" ::"c"(words), "d"(bus), "S"(edi)); // Send Data
|
|
// asm("popw %ds");
|
|
for (int h = 0; h < words; h++) {
|
|
io_out16(bus, word_[i * words + h]);
|
|
}
|
|
}
|
|
ide_write(channel, ATA_REG_COMMAND,
|
|
(char[]) {ATA_CMD_CACHE_FLUSH, ATA_CMD_CACHE_FLUSH,
|
|
ATA_CMD_CACHE_FLUSH_EXT}[lba_mode]);
|
|
ide_polling(channel, 0); // Polling.
|
|
}
|
|
|
|
return 0; // Easy, isn't it?
|
|
}
|
|
|
|
void ide_wait_irq() {
|
|
while (!ide_irq_invoked);
|
|
ide_irq_invoked = 0;
|
|
}
|
|
|
|
void ide_irq() {
|
|
logk("ide irq.\n");
|
|
ide_irq_invoked = 1;
|
|
}
|
|
|
|
unsigned char ide_atapi_read(unsigned char drive, unsigned int lba,
|
|
unsigned char numsects, unsigned short selector,
|
|
unsigned int edi) {
|
|
logk("cdrom read.\n");
|
|
unsigned int channel = ide_devices[drive].Channel;
|
|
unsigned int slavebit = ide_devices[drive].Drive;
|
|
unsigned int bus = channels[channel].base;
|
|
unsigned int words =
|
|
1024; // Sector Size. ATAPI drives have a sector size of 2048 bytes.
|
|
unsigned char err;
|
|
int i;
|
|
|
|
ide_write(channel, ATA_REG_CONTROL,
|
|
channels[channel].nIEN = ide_irq_invoked = 0x0);
|
|
// (I): Setup SCSI Packet:
|
|
// ------------------------------------------------------------------
|
|
logk("I\n");
|
|
atapi_packet[0] = ATAPI_CMD_READ;
|
|
atapi_packet[1] = 0x0;
|
|
atapi_packet[2] = (lba >> 24) & 0xFF;
|
|
atapi_packet[3] = (lba >> 16) & 0xFF;
|
|
atapi_packet[4] = (lba >> 8) & 0xFF;
|
|
atapi_packet[5] = (lba >> 0) & 0xFF;
|
|
atapi_packet[6] = 0x0;
|
|
atapi_packet[7] = 0x0;
|
|
atapi_packet[8] = 0x0;
|
|
atapi_packet[9] = numsects;
|
|
atapi_packet[10] = 0x0;
|
|
atapi_packet[11] = 0x0; // (II): Select the drive:
|
|
// ------------------------------------------------------------------
|
|
ide_write(channel, ATA_REG_HDDEVSEL, slavebit << 4);
|
|
logk("II\n");
|
|
// (III): Delay 400 nanoseconds for select to complete:
|
|
for (int i = 0; i < 4000; i++);
|
|
logk("III\n");
|
|
// ------------------------------------------------------------------
|
|
logk("IV\n");
|
|
for (int i = 0; i < 4; i++)
|
|
ide_read(channel,
|
|
ATA_REG_ALTSTATUS); // Reading the Alternate Status port wastes
|
|
// 100ns. (IV): Inform the Controller that we
|
|
// use PIO mode:
|
|
// ------------------------------------------------------------------
|
|
ide_write(channel, ATA_REG_FEATURES,
|
|
0); // PIO mode.
|
|
// (V): Tell the Controller the size of buffer:
|
|
// ------------------------------------------------------------------
|
|
logk("V\n");
|
|
ide_write(channel, ATA_REG_LBA1,
|
|
(words * 2) & 0xFF); // Lower Byte of Sector Size.
|
|
ide_write(channel, ATA_REG_LBA2,
|
|
(words * 2) >> 8); // Upper Byte of Sector Size.
|
|
// (VI): Send the Packet Command:
|
|
// ------------------------------------------------------------------
|
|
ide_write(channel, ATA_REG_COMMAND, ATA_CMD_PACKET); // Send the Command.
|
|
|
|
// (VII): Waiting for the driver to finish or return an error code:
|
|
// ------------------------------------------------------------------
|
|
if (err = ide_polling(channel, 1))
|
|
return err; // Polling and return if error.
|
|
|
|
// (VIII): Sending the packet data:
|
|
// ------------------------------------------------------------------
|
|
logk("VIII\n");
|
|
uint16_t *_atapi_packet = atapi_packet;
|
|
for (int i = 0; i < 6; i++) {
|
|
io_out16(bus, _atapi_packet[i]);
|
|
}
|
|
// (IX): Receiving Data:
|
|
// ------------------------------------------------------------------
|
|
logk("IX\n");
|
|
uint16_t *_word = edi;
|
|
for (i = 0; i < numsects; i++) {
|
|
ide_wait_irq(); // Wait for an IRQ.
|
|
if (err = ide_polling(channel, 1))
|
|
return err; // Polling and return if error.
|
|
logk("words = %d\n", words);
|
|
for (int h = 0; h < words; h++) {
|
|
uint16_t a = io_in16(bus);
|
|
_word[i * words + h] = a;
|
|
}
|
|
}
|
|
// (X): Waiting for an IRQ:
|
|
// ------------------------------------------------------------------
|
|
ide_wait_irq();
|
|
|
|
// (XI): Waiting for BSY & DRQ to clear:
|
|
// ------------------------------------------------------------------
|
|
while (ide_read(channel, ATA_REG_STATUS) & (ATA_SR_BSY | ATA_SR_DRQ));
|
|
|
|
return 0; // Easy, ... Isn't it?
|
|
}
|
|
|
|
void ide_read_sectors(unsigned char drive, unsigned char numsects,
|
|
unsigned int lba, unsigned short es, unsigned int edi) {
|
|
// 1: Check if the drive presents:
|
|
// ==================================
|
|
if (drive > 3 || ide_devices[drive].Reserved == 0)
|
|
package[0] = 0x1; // Drive Not Found!
|
|
|
|
// 2: Check if inputs are valid:
|
|
// ==================================
|
|
else if (((lba + numsects) > ide_devices[drive].Size) &&
|
|
(ide_devices[drive].Type == IDE_ATA))
|
|
package[0] = 0x2; // Seeking to invalid position.
|
|
|
|
// 3: Read in PIO Mode through Polling & IRQs:
|
|
// ============================================
|
|
else {
|
|
unsigned char err;
|
|
if (ide_devices[drive].Type == IDE_ATA) {
|
|
logk("Will Read.\n");
|
|
err = ide_ata_access(ATA_READ, drive, lba, numsects, es, edi);
|
|
|
|
} else if (ide_devices[drive].Type == IDE_ATAPI)
|
|
for (int i = 0; i < numsects; i++)
|
|
err = ide_atapi_read(drive, lba + i, 1, es, edi + (i * 2048));
|
|
package[0] = ide_print_error(drive, err);
|
|
}
|
|
}
|
|
|
|
void ide_write_sectors(unsigned char drive, unsigned char numsects,
|
|
unsigned int lba, unsigned short es, unsigned int edi) {
|
|
// 1: Check if the drive presents:
|
|
// ==================================
|
|
if (drive > 3 || ide_devices[drive].Reserved == 0)
|
|
package[0] = 0x1; // Drive Not Found!
|
|
// 2: Check if inputs are valid:
|
|
// ==================================
|
|
else if (((lba + numsects) > ide_devices[drive].Size) &&
|
|
(ide_devices[drive].Type == IDE_ATA))
|
|
package[0] = 0x2; // Seeking to invalid position.
|
|
// 3: Read in PIO Mode through Polling & IRQs:
|
|
// ============================================
|
|
else {
|
|
unsigned char err;
|
|
if (ide_devices[drive].Type == IDE_ATA)
|
|
err = ide_ata_access(ATA_WRITE, drive, lba, numsects, es, edi);
|
|
else if (ide_devices[drive].Type == IDE_ATAPI)
|
|
err = 4; // Write-Protected.
|
|
package[0] = ide_print_error(drive, err);
|
|
}
|
|
}
|
|
|
|
void ide_atapi_eject(unsigned char drive) {
|
|
unsigned int channel = ide_devices[drive].Channel;
|
|
unsigned int slavebit = ide_devices[drive].Drive;
|
|
unsigned int bus = channels[channel].base;
|
|
unsigned int words = 2048 / 2; // Sector Size in Words.
|
|
unsigned char err = 0;
|
|
ide_irq_invoked = 0;
|
|
|
|
// 1: Check if the drive presents:
|
|
// ==================================
|
|
if (drive > 3 || ide_devices[drive].Reserved == 0)
|
|
package[0] = 0x1; // Drive Not Found!
|
|
// 2: Check if drive isn't ATAPI:
|
|
// ==================================
|
|
else if (ide_devices[drive].Type == IDE_ATA)
|
|
package[0] = 20; // Command Aborted.
|
|
// 3: Eject ATAPI Driver:
|
|
// ============================================
|
|
else {
|
|
// Enable IRQs:
|
|
ide_write(channel, ATA_REG_CONTROL,
|
|
channels[channel].nIEN = ide_irq_invoked = 0x0);
|
|
|
|
// (I): Setup SCSI Packet:
|
|
// ------------------------------------------------------------------
|
|
atapi_packet[0] = ATAPI_CMD_EJECT;
|
|
atapi_packet[1] = 0x00;
|
|
atapi_packet[2] = 0x00;
|
|
atapi_packet[3] = 0x00;
|
|
atapi_packet[4] = 0x02;
|
|
atapi_packet[5] = 0x00;
|
|
atapi_packet[6] = 0x00;
|
|
atapi_packet[7] = 0x00;
|
|
atapi_packet[8] = 0x00;
|
|
atapi_packet[9] = 0x00;
|
|
atapi_packet[10] = 0x00;
|
|
atapi_packet[11] = 0x00;
|
|
|
|
// (II): Select the Drive:
|
|
// ------------------------------------------------------------------
|
|
ide_write(channel, ATA_REG_HDDEVSEL, slavebit << 4);
|
|
|
|
// (III): Delay 400 nanosecond for select to complete:
|
|
// ------------------------------------------------------------------
|
|
for (int i = 0; i < 4; i++)
|
|
ide_read(
|
|
channel,
|
|
ATA_REG_ALTSTATUS); // Reading Alternate Status Port wastes 100ns.
|
|
|
|
// (IV): Send the Packet Command:
|
|
// ------------------------------------------------------------------
|
|
ide_write(channel, ATA_REG_COMMAND, ATA_CMD_PACKET); // Send the Command.
|
|
|
|
// (V): Waiting for the driver to finish or invoke an error:
|
|
// ------------------------------------------------------------------
|
|
err = ide_polling(channel, 1); // Polling and stop if error.
|
|
|
|
// (VI): Sending the packet data:
|
|
// ------------------------------------------------------------------
|
|
|
|
asm("rep outsw"::"c"(6), "d"(bus),
|
|
"S"(atapi_packet)); // Send Packet Data
|
|
ide_wait_irq(); // Wait for an IRQ.
|
|
err = ide_polling(channel, 1); // Polling and get error code.
|
|
if (err == 3)
|
|
err = 0; // DRQ is not needed here.
|
|
|
|
package[0] = ide_print_error(drive, err); // Return;
|
|
}
|
|
} |