58 lines
1.9 KiB
C
58 lines
1.9 KiB
C
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#ifndef CRASHPOWEROS_PCI_H
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#define CRASHPOWEROS_PCI_H
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#define PCI_COMMAND_PORT 0xCF8
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#define PCI_DATA_PORT 0xCFC
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#define mem_mapping 0
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#define input_output 1
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#include <stdint.h>
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typedef struct base_address_register {
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int prefetchable;
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uint8_t* address;
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uint32_t size;
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int type;
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} base_address_register;
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struct pci_config_space_public {
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unsigned short VendorID;
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unsigned short DeviceID;
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unsigned short Command;
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unsigned short Status;
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unsigned char RevisionID;
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unsigned char ProgIF;
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unsigned char SubClass;
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unsigned char BaseClass;
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unsigned char CacheLineSize;
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unsigned char LatencyTimer;
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unsigned char HeaderType;
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unsigned char BIST;
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unsigned int BaseAddr[6];
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unsigned int CardbusCIS;
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unsigned short SubVendorID;
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unsigned short SubSystemID;
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unsigned int ROMBaseAddr;
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unsigned char CapabilitiesPtr;
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unsigned char Reserved[3];
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unsigned int Reserved1;
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unsigned char InterruptLine;
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unsigned char InterruptPin;
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unsigned char MinGrant;
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unsigned char MaxLatency;
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};
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uint32_t pci_read_command_status(uint8_t bus, uint8_t slot, uint8_t func);
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void PCI_GET_DEVICE(uint16_t vendor_id, uint16_t device_id, uint8_t* bus, uint8_t* slot, uint8_t* func);
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uint32_t pci_get_port_base(uint8_t bus, uint8_t slot, uint8_t func);
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uint8_t pci_get_drive_irq(uint8_t bus, uint8_t slot, uint8_t func);
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void pci_write_command_status(uint8_t bus, uint8_t slot, uint8_t func, uint32_t value);
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void write_pci(uint8_t bus, uint8_t device, uint8_t function, uint8_t registeroffset, uint32_t value);
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uint32_t read_bar_n(uint8_t bus, uint8_t device, uint8_t function, uint8_t bar_n);
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uint32_t read_pci(uint8_t bus, uint8_t device, uint8_t function, uint8_t registeroffset);
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base_address_register get_base_address_register(uint8_t bus, uint8_t device, uint8_t function, uint8_t bar);
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void pci_config(unsigned int bus, unsigned int f, unsigned int equipment, unsigned int adder);
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void init_pci();
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#endif
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