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This commit is contained in:
Anselm Levskaya
parent
f964fd0d18
commit
fdb877c4d1
130
cpux86-ta.js
130
cpux86-ta.js
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@ -2042,7 +2042,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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}
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return qc;
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}
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function fd(gd) {
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function check_status_bits_for_jump(gd) {
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var qc;
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switch (gd >> 1) {
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case 0:
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@ -2134,7 +2134,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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blow_up(intno, 0);
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}
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function rd(sd) {
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function change_permission_level(sd) {
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cpu.cpl = sd;
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if (cpu.cpl == 3) {
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_tlb_read_ = tlb_read_user;
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@ -3655,7 +3655,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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regs[4] = (regs[4] & ~Pa) | ((le) & Pa);
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selector = (selector & ~3) | he;
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set_segment_vars(1, selector, ae(Yd, Wd), Zd(Yd, Wd), Wd);
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rd(he);
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change_permission_level(he);
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eip = ve, Kb = Mb = 0;
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if ((ie & 1) == 0) {
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cpu.eflags &= ~0x00000200;
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@ -4139,7 +4139,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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}
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selector = (selector & ~3) | he;
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set_segment_vars(1, selector, ae(Yd, Wd), Zd(Yd, Wd), Wd);
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rd(he);
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change_permission_level(he);
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regs[4] = (regs[4] & ~Pa) | ((Te) & Pa);
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eip = ve, Kb = Mb = 0;
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}
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@ -4266,7 +4266,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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}
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kd(df, 0x00000100 | 0x00040000 | 0x00200000 | 0x00000200 | 0x00003000 | 0x00020000 | 0x00004000 | 0x00080000 | 0x00100000);
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fe(1, Ke & 0xffff);
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rd(3);
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change_permission_level(3);
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fe(2, gf & 0xffff);
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fe(0, hf & 0xffff);
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fe(3, jf & 0xffff);
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@ -4365,7 +4365,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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set_segment_vars(2, gf, ae(we, xe), Zd(we, xe), xe);
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}
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set_segment_vars(1, Ke, ae(Yd, Wd), Zd(Yd, Wd), Wd);
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rd(He);
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change_permission_level(He);
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Te = wd;
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Pa = Vd(xe);
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Pe(0, He);
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@ -5668,7 +5668,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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OPbyte |= (Da = Ra) & 0x0100;
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Fd: for (; ; ) {
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switch (OPbyte) {
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case 0x66:
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case 0x66://Operand-size override prefix
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if (Da == Ra)
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Cd(Nb, OPbyte);
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if (Ra & 0x0100)
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@ -5678,7 +5678,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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OPbyte = phys_mem8[Kb++];
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OPbyte |= (Da & 0x0100);
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break;
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case 0x67:
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case 0x67://Address-size override prefix
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if (Da == Ra)
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Cd(Nb, OPbyte);
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if (Ra & 0x0080)
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@ -5688,21 +5688,21 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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OPbyte = phys_mem8[Kb++];
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OPbyte |= (Da & 0x0100);
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break;
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case 0xf0:
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case 0xf0://LOCK Assert LOCK# Signal Prefix
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if (Da == Ra)
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Cd(Nb, OPbyte);
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Da |= 0x0040;
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OPbyte = phys_mem8[Kb++];
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OPbyte |= (Da & 0x0100);
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break;
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case 0xf2:
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case 0xf2://REPNZ Repeat String Operation Prefix
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if (Da == Ra)
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Cd(Nb, OPbyte);
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Da |= 0x0020;
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OPbyte = phys_mem8[Kb++];
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OPbyte |= (Da & 0x0100);
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break;
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case 0xf3:
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case 0xf3://REPZ Repeat String Operation Prefix
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if (Da == Ra)
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Cd(Nb, OPbyte);
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Da |= 0x0010;
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@ -5727,7 +5727,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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OPbyte = phys_mem8[Kb++];
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OPbyte |= (Da & 0x0100);
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break;
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case 0xb0://op = B0+r MOV r8 imm8
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case 0xb0://B0+r MOV r8 imm8
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case 0xb1:
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case 0xb2:
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case 0xb3:
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@ -5740,7 +5740,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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Ua = (OPbyte & 4) << 1;
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regs[OPbyte & 3] = (regs[OPbyte & 3] & ~(0xff << Ua)) | (((ga) & 0xff) << Ua);
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break Fd;
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case 0xb8://op = B8+r MOV r16/32 imm16/32
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case 0xb8://B8+r MOV r16/32 imm16/32
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case 0xb9:
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case 0xba:
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case 0xbb:
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@ -5946,26 +5946,17 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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case 0xc4://LES ES r16/32 m16:16/32 Load Far Pointer
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Uf(0);
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break Fd;
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// C5 r LDS DS r16/32 m16:16/32 Load Far Pointer
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case 0xc5:
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case 0xc5://LDS DS r16/32 m16:16/32 Load Far Pointer
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Uf(3);
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break Fd;
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// 00 r L ADD r/m8 r8 o..szapc o..szapc Add
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// 08 r L OR r/m8 r8 o..szapc o..sz.pc .....a.. o......c Logical Inclusive OR
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// 10 r L ADC r/m8 r8 .......c o..szapc o..szapc Add with Carry
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// 18 r L SBB r/m8 r8 .......c o..szapc o..szapc Integer Subtraction with Borrow
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// 20 r L AND r/m8 r8 o..szapc o..sz.pc .....a.. o......c Logical AND
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// 28 r L SUB r/m8 r8 o..szapc o..szapc Subtract
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// 30 r L XOR r/m8 r8 o..szapc o..sz.pc .....a.. o......c Logical Exclusive OR
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// 38 r CMP r/m8 r8 o..szapc o..szapc Compare Two Operands
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case 0x00:
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case 0x08:
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case 0x10:
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case 0x18:
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case 0x20:
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case 0x28:
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case 0x30:
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case 0x38:
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case 0x00://ADD r/m8 r8 Add
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case 0x08://OR r/m8 r8 Logical Inclusive OR
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case 0x10://ADC r/m8 r8 Add with Carry
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case 0x18://SBB r/m8 r8 Integer Subtraction with Borrow
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case 0x20://AND r/m8 r8 Logical AND
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case 0x28://SUB r/m8 r8 Subtract
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case 0x30://XOR r/m8 r8 Logical Exclusive OR
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case 0x38://CMP r/m8 r8 Compare Two Operands
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mem8 = phys_mem8[Kb++];
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Ja = OPbyte >> 3;
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Ga = (mem8 >> 3) & 7;
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@ -5985,7 +5976,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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}
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}
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break Fd;
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case 0x01:
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case 0x01://ADD r/m16/32 r16/32 Add
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mem8 = phys_mem8[Kb++];
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Ha = regs[(mem8 >> 3) & 7];
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if ((mem8 >> 6) == 3) {
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@ -6006,12 +5997,12 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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wb(ga);
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}
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break Fd;
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case 0x09:
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case 0x11:
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case 0x19:
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case 0x21:
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case 0x29:
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case 0x31:
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case 0x09://OR r/m16/32 r16/32 Logical Inclusive OR
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case 0x11://ADC r/m16/32 r16/32 Add with Carry
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case 0x19://SBB r/m16/32 r16/32 Integer Subtraction with Borrow
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case 0x21://AND r/m16/32 r16/32 Logical AND
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case 0x29://SUB r/m16/32 r16/32 Subtract
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case 0x31://XOR r/m16/32 r16/32 Logical Exclusive OR
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mem8 = phys_mem8[Kb++];
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Ja = OPbyte >> 3;
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Ha = regs[(mem8 >> 3) & 7];
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@ -6025,7 +6016,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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wb(ga);
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}
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break Fd;
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case 0x39:
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case 0x39://CMP r/m16/32 r16/32 Compare Two Operands
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mem8 = phys_mem8[Kb++];
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Ja = OPbyte >> 3;
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Ha = regs[(mem8 >> 3) & 7];
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@ -6046,14 +6037,14 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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}
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}
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break Fd;
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case 0x02:
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case 0x0a:
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case 0x12:
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case 0x1a:
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case 0x22:
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case 0x2a:
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case 0x32:
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case 0x3a:
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case 0x02://ADD r8 r/m8 Add
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case 0x0a://OR r8 r/m8 Logical Inclusive OR
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case 0x12://ADC r8 r/m8 Add with Carry
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case 0x1a://SBB r8 r/m8 Integer Subtraction with Borrow
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case 0x22://AND r8 r/m8 Logical AND
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case 0x2a://SUB r8 r/m8 Subtract
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case 0x32://XOR r8 r/m8 Logical Exclusive OR
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case 0x3a://CMP r8 r/m8 Compare Two Operands
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mem8 = phys_mem8[Kb++];
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Ja = OPbyte >> 3;
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Ga = (mem8 >> 3) & 7;
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@ -7568,6 +7559,37 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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case 0x0f:
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OPbyte = phys_mem8[Kb++];
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switch (OPbyte) {
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/*
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0F 80 03+ JO rel16/32 o....... Jump short if overflow (OF=1)
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0F 81 03+ JNO rel16/32 o....... Jump short if not overflow (OF=0)
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0F 82 03+ JB rel16/32 .......c Jump short if below/not above or equal/carry (CF=1)
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JNAE rel16/32
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JC rel16/32
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0F 83 03+ JNB rel16/32 .......c Jump short if not below/above or equal/not carry (CF=0)
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JAE rel16/32
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JNC rel16/32
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0F 84 03+ JZ rel16/32 ....z... Jump short if zero/equal (ZF=0)
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JE rel16/32
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0F 85 03+ JNZ rel16/32 ....z... Jump short if not zero/not equal (ZF=1)
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JNE rel16/32
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0F 86 03+ JBE rel16/32 ....z..c Jump short if below or equal/not above (CF=1 AND ZF=1)
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JNA rel16/32
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0F 87 03+ JNBE rel16/32 ....z..c Jump short if not below or equal/above (CF=0 AND ZF=0)
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JA rel16/32
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0F 88 03+ JS rel16/32 ...s.... Jump short if sign (SF=1)
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0F 89 03+ JNS rel16/32 ...s.... Jump short if not sign (SF=0)
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0F 8A 03+ JP rel16/32 ......p. Jump short if parity/parity even (PF=1)
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JPE rel16/32
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0F 8B 03+ JNP rel16/32 ......p. Jump short if not parity/parity odd
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JPO rel16/32
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0F 8C 03+ JL rel16/32 o..s.... Jump short if less/not greater (SF!=OF)
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JNGE rel16/32
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0F 8D 03+ JNL rel16/32 o..s.... Jump short if not less/greater or equal (SF=OF)
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JGE rel16/32
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0F 8E 03+ JLE rel16/32 o..sz... Jump short if less or equal/not greater ((ZF=1) OR (SF!=OF))
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JNG rel16/32
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0F 8F 03+ JNLE rel16/32 o..sz... Jump short if not less nor equal/greater ((ZF=0) AND (SF=OF))
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*/
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case 0x80:
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case 0x81:
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case 0x82:
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@ -7588,7 +7610,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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ga = phys_mem8[Kb] | (phys_mem8[Kb + 1] << 8) | (phys_mem8[Kb + 2] << 16) | (phys_mem8[Kb + 3] << 24);
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Kb += 4;
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}
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if (fd(OPbyte & 0xf))
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if (check_status_bits_for_jump(OPbyte & 0xf))
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Kb = (Kb + ga) >> 0;
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break Fd;
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case 0x90:
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@ -7608,7 +7630,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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case 0x9e:
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case 0x9f:
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mem8 = phys_mem8[Kb++];
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ga = fd(OPbyte & 0xf);
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ga = check_status_bits_for_jump(OPbyte & 0xf);
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if ((mem8 >> 6) == 3) {
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set_either_two_bytes_of_reg_ABCD(mem8 & 7, ga);
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} else {
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@ -7639,7 +7661,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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mem8_loc = Pb(mem8);
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ga = ld_32bits_mem8_read();
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}
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if (fd(OPbyte & 0xf))
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if (check_status_bits_for_jump(OPbyte & 0xf))
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regs[(mem8 >> 3) & 7] = ga;
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break Fd;
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case 0xb6:
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@ -8828,7 +8850,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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case 0x17e:
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case 0x17f:
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ga = ((phys_mem8[Kb++] << 24) >> 24);
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Ha = fd(OPbyte & 0xf);
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Ha = check_status_bits_for_jump(OPbyte & 0xf);
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if (Ha)
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eip = (eip + Kb - Mb + ga) & 0xffff, Kb = Mb = 0;
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break Fd;
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@ -9061,7 +9083,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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case 0x18e:
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case 0x18f:
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ga = Ob();
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if (fd(OPbyte & 0xf))
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if (check_status_bits_for_jump(OPbyte & 0xf))
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eip = (eip + Kb - Mb + ga) & 0xffff, Kb = Mb = 0;
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break Fd;
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case 0x140:
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@ -9087,7 +9109,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
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mem8_loc = Pb(mem8);
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ga = ld_16bits_mem8_read();
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}
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if (fd(OPbyte & 0xf))
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if (check_status_bits_for_jump(OPbyte & 0xf))
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set_lower_two_bytes_of_register((mem8 >> 3) & 7, ga);
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break Fd;
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case 0x1b6:
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@ -10482,6 +10504,8 @@ PCEmulator.prototype.reset = function() { this.request_request = 1; };
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