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This commit is contained in:
Anselm Levskaya 2011-12-20 17:18:08 -08:00
parent f964fd0d18
commit fdb877c4d1
1 changed files with 214 additions and 190 deletions
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130
cpux86-ta.js
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@ -2042,7 +2042,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
} }
return qc; return qc;
} }
function fd(gd) { function check_status_bits_for_jump(gd) {
var qc; var qc;
switch (gd >> 1) { switch (gd >> 1) {
case 0: case 0:
@ -2134,7 +2134,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
blow_up(intno, 0); blow_up(intno, 0);
} }
function rd(sd) { function change_permission_level(sd) {
cpu.cpl = sd; cpu.cpl = sd;
if (cpu.cpl == 3) { if (cpu.cpl == 3) {
_tlb_read_ = tlb_read_user; _tlb_read_ = tlb_read_user;
@ -3655,7 +3655,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
regs[4] = (regs[4] & ~Pa) | ((le) & Pa); regs[4] = (regs[4] & ~Pa) | ((le) & Pa);
selector = (selector & ~3) | he; selector = (selector & ~3) | he;
set_segment_vars(1, selector, ae(Yd, Wd), Zd(Yd, Wd), Wd); set_segment_vars(1, selector, ae(Yd, Wd), Zd(Yd, Wd), Wd);
rd(he); change_permission_level(he);
eip = ve, Kb = Mb = 0; eip = ve, Kb = Mb = 0;
if ((ie & 1) == 0) { if ((ie & 1) == 0) {
cpu.eflags &= ~0x00000200; cpu.eflags &= ~0x00000200;
@ -4139,7 +4139,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
} }
selector = (selector & ~3) | he; selector = (selector & ~3) | he;
set_segment_vars(1, selector, ae(Yd, Wd), Zd(Yd, Wd), Wd); set_segment_vars(1, selector, ae(Yd, Wd), Zd(Yd, Wd), Wd);
rd(he); change_permission_level(he);
regs[4] = (regs[4] & ~Pa) | ((Te) & Pa); regs[4] = (regs[4] & ~Pa) | ((Te) & Pa);
eip = ve, Kb = Mb = 0; eip = ve, Kb = Mb = 0;
} }
@ -4266,7 +4266,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
} }
kd(df, 0x00000100 | 0x00040000 | 0x00200000 | 0x00000200 | 0x00003000 | 0x00020000 | 0x00004000 | 0x00080000 | 0x00100000); kd(df, 0x00000100 | 0x00040000 | 0x00200000 | 0x00000200 | 0x00003000 | 0x00020000 | 0x00004000 | 0x00080000 | 0x00100000);
fe(1, Ke & 0xffff); fe(1, Ke & 0xffff);
rd(3); change_permission_level(3);
fe(2, gf & 0xffff); fe(2, gf & 0xffff);
fe(0, hf & 0xffff); fe(0, hf & 0xffff);
fe(3, jf & 0xffff); fe(3, jf & 0xffff);
@ -4365,7 +4365,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
set_segment_vars(2, gf, ae(we, xe), Zd(we, xe), xe); set_segment_vars(2, gf, ae(we, xe), Zd(we, xe), xe);
} }
set_segment_vars(1, Ke, ae(Yd, Wd), Zd(Yd, Wd), Wd); set_segment_vars(1, Ke, ae(Yd, Wd), Zd(Yd, Wd), Wd);
rd(He); change_permission_level(He);
Te = wd; Te = wd;
Pa = Vd(xe); Pa = Vd(xe);
Pe(0, He); Pe(0, He);
@ -5668,7 +5668,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
OPbyte |= (Da = Ra) & 0x0100; OPbyte |= (Da = Ra) & 0x0100;
Fd: for (; ; ) { Fd: for (; ; ) {
switch (OPbyte) { switch (OPbyte) {
case 0x66: case 0x66://Operand-size override prefix
if (Da == Ra) if (Da == Ra)
Cd(Nb, OPbyte); Cd(Nb, OPbyte);
if (Ra & 0x0100) if (Ra & 0x0100)
@ -5678,7 +5678,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
OPbyte = phys_mem8[Kb++]; OPbyte = phys_mem8[Kb++];
OPbyte |= (Da & 0x0100); OPbyte |= (Da & 0x0100);
break; break;
case 0x67: case 0x67://Address-size override prefix
if (Da == Ra) if (Da == Ra)
Cd(Nb, OPbyte); Cd(Nb, OPbyte);
if (Ra & 0x0080) if (Ra & 0x0080)
@ -5688,21 +5688,21 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
OPbyte = phys_mem8[Kb++]; OPbyte = phys_mem8[Kb++];
OPbyte |= (Da & 0x0100); OPbyte |= (Da & 0x0100);
break; break;
case 0xf0: case 0xf0://LOCK Assert LOCK# Signal Prefix
if (Da == Ra) if (Da == Ra)
Cd(Nb, OPbyte); Cd(Nb, OPbyte);
Da |= 0x0040; Da |= 0x0040;
OPbyte = phys_mem8[Kb++]; OPbyte = phys_mem8[Kb++];
OPbyte |= (Da & 0x0100); OPbyte |= (Da & 0x0100);
break; break;
case 0xf2: case 0xf2://REPNZ Repeat String Operation Prefix
if (Da == Ra) if (Da == Ra)
Cd(Nb, OPbyte); Cd(Nb, OPbyte);
Da |= 0x0020; Da |= 0x0020;
OPbyte = phys_mem8[Kb++]; OPbyte = phys_mem8[Kb++];
OPbyte |= (Da & 0x0100); OPbyte |= (Da & 0x0100);
break; break;
case 0xf3: case 0xf3://REPZ Repeat String Operation Prefix
if (Da == Ra) if (Da == Ra)
Cd(Nb, OPbyte); Cd(Nb, OPbyte);
Da |= 0x0010; Da |= 0x0010;
@ -5727,7 +5727,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
OPbyte = phys_mem8[Kb++]; OPbyte = phys_mem8[Kb++];
OPbyte |= (Da & 0x0100); OPbyte |= (Da & 0x0100);
break; break;
case 0xb0://op = B0+r MOV r8 imm8 case 0xb0://B0+r MOV r8 imm8
case 0xb1: case 0xb1:
case 0xb2: case 0xb2:
case 0xb3: case 0xb3:
@ -5740,7 +5740,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
Ua = (OPbyte & 4) << 1; Ua = (OPbyte & 4) << 1;
regs[OPbyte & 3] = (regs[OPbyte & 3] & ~(0xff << Ua)) | (((ga) & 0xff) << Ua); regs[OPbyte & 3] = (regs[OPbyte & 3] & ~(0xff << Ua)) | (((ga) & 0xff) << Ua);
break Fd; break Fd;
case 0xb8://op = B8+r MOV r16/32 imm16/32 case 0xb8://B8+r MOV r16/32 imm16/32
case 0xb9: case 0xb9:
case 0xba: case 0xba:
case 0xbb: case 0xbb:
@ -5946,26 +5946,17 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
case 0xc4://LES ES r16/32 m16:16/32 Load Far Pointer case 0xc4://LES ES r16/32 m16:16/32 Load Far Pointer
Uf(0); Uf(0);
break Fd; break Fd;
// C5 r LDS DS r16/32 m16:16/32 Load Far Pointer case 0xc5://LDS DS r16/32 m16:16/32 Load Far Pointer
case 0xc5:
Uf(3); Uf(3);
break Fd; break Fd;
// 00 r L ADD r/m8 r8 o..szapc o..szapc Add case 0x00://ADD r/m8 r8 Add
// 08 r L OR r/m8 r8 o..szapc o..sz.pc .....a.. o......c Logical Inclusive OR case 0x08://OR r/m8 r8 Logical Inclusive OR
// 10 r L ADC r/m8 r8 .......c o..szapc o..szapc Add with Carry case 0x10://ADC r/m8 r8 Add with Carry
// 18 r L SBB r/m8 r8 .......c o..szapc o..szapc Integer Subtraction with Borrow case 0x18://SBB r/m8 r8 Integer Subtraction with Borrow
// 20 r L AND r/m8 r8 o..szapc o..sz.pc .....a.. o......c Logical AND case 0x20://AND r/m8 r8 Logical AND
// 28 r L SUB r/m8 r8 o..szapc o..szapc Subtract case 0x28://SUB r/m8 r8 Subtract
// 30 r L XOR r/m8 r8 o..szapc o..sz.pc .....a.. o......c Logical Exclusive OR case 0x30://XOR r/m8 r8 Logical Exclusive OR
// 38 r CMP r/m8 r8 o..szapc o..szapc Compare Two Operands case 0x38://CMP r/m8 r8 Compare Two Operands
case 0x00:
case 0x08:
case 0x10:
case 0x18:
case 0x20:
case 0x28:
case 0x30:
case 0x38:
mem8 = phys_mem8[Kb++]; mem8 = phys_mem8[Kb++];
Ja = OPbyte >> 3; Ja = OPbyte >> 3;
Ga = (mem8 >> 3) & 7; Ga = (mem8 >> 3) & 7;
@ -5985,7 +5976,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
} }
} }
break Fd; break Fd;
case 0x01: case 0x01://ADD r/m16/32 r16/32 Add
mem8 = phys_mem8[Kb++]; mem8 = phys_mem8[Kb++];
Ha = regs[(mem8 >> 3) & 7]; Ha = regs[(mem8 >> 3) & 7];
if ((mem8 >> 6) == 3) { if ((mem8 >> 6) == 3) {
@ -6006,12 +5997,12 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
wb(ga); wb(ga);
} }
break Fd; break Fd;
case 0x09: case 0x09://OR r/m16/32 r16/32 Logical Inclusive OR
case 0x11: case 0x11://ADC r/m16/32 r16/32 Add with Carry
case 0x19: case 0x19://SBB r/m16/32 r16/32 Integer Subtraction with Borrow
case 0x21: case 0x21://AND r/m16/32 r16/32 Logical AND
case 0x29: case 0x29://SUB r/m16/32 r16/32 Subtract
case 0x31: case 0x31://XOR r/m16/32 r16/32 Logical Exclusive OR
mem8 = phys_mem8[Kb++]; mem8 = phys_mem8[Kb++];
Ja = OPbyte >> 3; Ja = OPbyte >> 3;
Ha = regs[(mem8 >> 3) & 7]; Ha = regs[(mem8 >> 3) & 7];
@ -6025,7 +6016,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
wb(ga); wb(ga);
} }
break Fd; break Fd;
case 0x39: case 0x39://CMP r/m16/32 r16/32 Compare Two Operands
mem8 = phys_mem8[Kb++]; mem8 = phys_mem8[Kb++];
Ja = OPbyte >> 3; Ja = OPbyte >> 3;
Ha = regs[(mem8 >> 3) & 7]; Ha = regs[(mem8 >> 3) & 7];
@ -6046,14 +6037,14 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
} }
} }
break Fd; break Fd;
case 0x02: case 0x02://ADD r8 r/m8 Add
case 0x0a: case 0x0a://OR r8 r/m8 Logical Inclusive OR
case 0x12: case 0x12://ADC r8 r/m8 Add with Carry
case 0x1a: case 0x1a://SBB r8 r/m8 Integer Subtraction with Borrow
case 0x22: case 0x22://AND r8 r/m8 Logical AND
case 0x2a: case 0x2a://SUB r8 r/m8 Subtract
case 0x32: case 0x32://XOR r8 r/m8 Logical Exclusive OR
case 0x3a: case 0x3a://CMP r8 r/m8 Compare Two Operands
mem8 = phys_mem8[Kb++]; mem8 = phys_mem8[Kb++];
Ja = OPbyte >> 3; Ja = OPbyte >> 3;
Ga = (mem8 >> 3) & 7; Ga = (mem8 >> 3) & 7;
@ -7568,6 +7559,37 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
case 0x0f: case 0x0f:
OPbyte = phys_mem8[Kb++]; OPbyte = phys_mem8[Kb++];
switch (OPbyte) { switch (OPbyte) {
/*
0F 80 03+ JO rel16/32 o....... Jump short if overflow (OF=1)
0F 81 03+ JNO rel16/32 o....... Jump short if not overflow (OF=0)
0F 82 03+ JB rel16/32 .......c Jump short if below/not above or equal/carry (CF=1)
JNAE rel16/32
JC rel16/32
0F 83 03+ JNB rel16/32 .......c Jump short if not below/above or equal/not carry (CF=0)
JAE rel16/32
JNC rel16/32
0F 84 03+ JZ rel16/32 ....z... Jump short if zero/equal (ZF=0)
JE rel16/32
0F 85 03+ JNZ rel16/32 ....z... Jump short if not zero/not equal (ZF=1)
JNE rel16/32
0F 86 03+ JBE rel16/32 ....z..c Jump short if below or equal/not above (CF=1 AND ZF=1)
JNA rel16/32
0F 87 03+ JNBE rel16/32 ....z..c Jump short if not below or equal/above (CF=0 AND ZF=0)
JA rel16/32
0F 88 03+ JS rel16/32 ...s.... Jump short if sign (SF=1)
0F 89 03+ JNS rel16/32 ...s.... Jump short if not sign (SF=0)
0F 8A 03+ JP rel16/32 ......p. Jump short if parity/parity even (PF=1)
JPE rel16/32
0F 8B 03+ JNP rel16/32 ......p. Jump short if not parity/parity odd
JPO rel16/32
0F 8C 03+ JL rel16/32 o..s.... Jump short if less/not greater (SF!=OF)
JNGE rel16/32
0F 8D 03+ JNL rel16/32 o..s.... Jump short if not less/greater or equal (SF=OF)
JGE rel16/32
0F 8E 03+ JLE rel16/32 o..sz... Jump short if less or equal/not greater ((ZF=1) OR (SF!=OF))
JNG rel16/32
0F 8F 03+ JNLE rel16/32 o..sz... Jump short if not less nor equal/greater ((ZF=0) AND (SF=OF))
*/
case 0x80: case 0x80:
case 0x81: case 0x81:
case 0x82: case 0x82:
@ -7588,7 +7610,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
ga = phys_mem8[Kb] | (phys_mem8[Kb + 1] << 8) | (phys_mem8[Kb + 2] << 16) | (phys_mem8[Kb + 3] << 24); ga = phys_mem8[Kb] | (phys_mem8[Kb + 1] << 8) | (phys_mem8[Kb + 2] << 16) | (phys_mem8[Kb + 3] << 24);
Kb += 4; Kb += 4;
} }
if (fd(OPbyte & 0xf)) if (check_status_bits_for_jump(OPbyte & 0xf))
Kb = (Kb + ga) >> 0; Kb = (Kb + ga) >> 0;
break Fd; break Fd;
case 0x90: case 0x90:
@ -7608,7 +7630,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
case 0x9e: case 0x9e:
case 0x9f: case 0x9f:
mem8 = phys_mem8[Kb++]; mem8 = phys_mem8[Kb++];
ga = fd(OPbyte & 0xf); ga = check_status_bits_for_jump(OPbyte & 0xf);
if ((mem8 >> 6) == 3) { if ((mem8 >> 6) == 3) {
set_either_two_bytes_of_reg_ABCD(mem8 & 7, ga); set_either_two_bytes_of_reg_ABCD(mem8 & 7, ga);
} else { } else {
@ -7639,7 +7661,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
mem8_loc = Pb(mem8); mem8_loc = Pb(mem8);
ga = ld_32bits_mem8_read(); ga = ld_32bits_mem8_read();
} }
if (fd(OPbyte & 0xf)) if (check_status_bits_for_jump(OPbyte & 0xf))
regs[(mem8 >> 3) & 7] = ga; regs[(mem8 >> 3) & 7] = ga;
break Fd; break Fd;
case 0xb6: case 0xb6:
@ -8828,7 +8850,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
case 0x17e: case 0x17e:
case 0x17f: case 0x17f:
ga = ((phys_mem8[Kb++] << 24) >> 24); ga = ((phys_mem8[Kb++] << 24) >> 24);
Ha = fd(OPbyte & 0xf); Ha = check_status_bits_for_jump(OPbyte & 0xf);
if (Ha) if (Ha)
eip = (eip + Kb - Mb + ga) & 0xffff, Kb = Mb = 0; eip = (eip + Kb - Mb + ga) & 0xffff, Kb = Mb = 0;
break Fd; break Fd;
@ -9061,7 +9083,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
case 0x18e: case 0x18e:
case 0x18f: case 0x18f:
ga = Ob(); ga = Ob();
if (fd(OPbyte & 0xf)) if (check_status_bits_for_jump(OPbyte & 0xf))
eip = (eip + Kb - Mb + ga) & 0xffff, Kb = Mb = 0; eip = (eip + Kb - Mb + ga) & 0xffff, Kb = Mb = 0;
break Fd; break Fd;
case 0x140: case 0x140:
@ -9087,7 +9109,7 @@ CPU_X86.prototype.exec_internal = function(ua, va) {
mem8_loc = Pb(mem8); mem8_loc = Pb(mem8);
ga = ld_16bits_mem8_read(); ga = ld_16bits_mem8_read();
} }
if (fd(OPbyte & 0xf)) if (check_status_bits_for_jump(OPbyte & 0xf))
set_lower_two_bytes_of_register((mem8 >> 3) & 7, ga); set_lower_two_bytes_of_register((mem8 >> 3) & 7, ga);
break Fd; break Fd;
case 0x1b6: case 0x1b6:
@ -10482,6 +10504,8 @@ PCEmulator.prototype.reset = function() { this.request_request = 1; };