autocommented the weird operation-size-counting function
This commit is contained in:
Anselm Levskaya
parent
a1931a3bab
commit
ba06acb66d
808
cpux86-ta.js
808
cpux86-ta.js
@ -2474,7 +2474,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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stride = 4;
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EXEC_LOOP: for (; ; ) {
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switch (OPbyte) {
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case 0x66:
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case 0x66:// Operand-size override prefix
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if (init_CS_flags & 0x0100) {
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stride = 4;
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CS_flags &= ~0x0100;
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@ -2482,15 +2482,15 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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stride = 2;
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CS_flags |= 0x0100;
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}
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case 0xf0:
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case 0xf2:
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case 0xf3:
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case 0x26:
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case 0x2e:
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case 0x36:
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case 0x3e:
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case 0x64:
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case 0x65:
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case 0xf0://LOCK Assert LOCK# Signal Prefix
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case 0xf2://REPNZ eCX Repeat String Operation Prefix
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case 0xf3://REPZ eCX Repeat String Operation Prefix
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case 0x26://ES ES ES segment override prefix
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case 0x2e://CS CS CS segment override prefix
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case 0x36://SS SS SS segment override prefix
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case 0x3e://DS DS DS segment override prefix
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case 0x64://FS FS FS segment override prefix
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case 0x65://GS GS GS segment override prefix
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{
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if ((n + 1) > 15)
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abort(6);
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@ -2498,7 +2498,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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OPbyte = (((last_tlb_val = _tlb_read_[mem8_loc >>> 12]) == -1) ? __ld_8bits_mem8_read() : phys_mem8[mem8_loc ^ last_tlb_val]);
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}
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break;
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case 0x67:
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case 0x67:// Address-size override prefix
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if (init_CS_flags & 0x0080) {
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CS_flags &= ~0x0080;
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} else {
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@ -2518,23 +2518,23 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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case 0x95:
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case 0x96:
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case 0x97:
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case 0x40:
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case 0x41:
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case 0x42:
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case 0x43:
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case 0x44:
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case 0x45:
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case 0x46:
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case 0x47:
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case 0x48:
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case 0x49:
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case 0x4a:
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case 0x4b:
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case 0x4c:
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case 0x4d:
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case 0x4e:
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case 0x4f:
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case 0x50:
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case 0x40://INC Zv Increment by 1
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case 0x41://REX.B Extension of r/m field, base field, or opcode reg field
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case 0x42://REX.X Extension of SIB index field
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case 0x43://REX.XB REX.X and REX.B combination
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case 0x44://REX.R Extension of ModR/M reg field
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case 0x45://REX.RB REX.R and REX.B combination
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case 0x46://REX.RX REX.R and REX.X combination
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case 0x47://REX.RXB REX.R, REX.X and REX.B combination
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case 0x48://DEC Zv Decrement by 1
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case 0x49://REX.WB REX.W and REX.B combination
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case 0x4a://REX.WX REX.W and REX.X combination
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case 0x4b://REX.WXB REX.W, REX.X and REX.B combination
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case 0x4c://REX.WR REX.W and REX.R combination
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case 0x4d://REX.WRB REX.W, REX.R and REX.B combination
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case 0x4e://REX.WRX REX.W, REX.R and REX.X combination
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case 0x4f://REX.WRXB REX.W, REX.R, REX.X and REX.B combination
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case 0x50://PUSH Zv SS:[rSP] Push Word, Doubleword or Quadword Onto the Stack
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case 0x51:
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case 0x52:
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case 0x53:
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@ -2542,7 +2542,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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case 0x55:
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case 0x56:
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case 0x57:
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case 0x58:
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case 0x58://POP SS:[rSP] Zv Pop a Value from the Stack
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case 0x59:
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case 0x5a:
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case 0x5b:
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@ -2550,62 +2550,62 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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case 0x5d:
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case 0x5e:
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case 0x5f:
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case 0x98:
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case 0x99:
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case 0xc9:
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case 0x9c:
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case 0x9d:
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case 0x06:
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case 0x0e:
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case 0x16:
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case 0x1e:
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case 0x07:
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case 0x17:
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case 0x1f:
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case 0xc3:
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case 0xcb:
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case 0x90:
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case 0xcc:
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case 0xce:
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case 0xcf:
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case 0xf5:
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case 0xf8:
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case 0xf9:
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case 0xfc:
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case 0xfd:
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case 0xfa:
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case 0xfb:
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case 0x9e:
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case 0x9f:
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case 0xf4:
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case 0xa4:
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case 0xa5:
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case 0xaa:
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case 0xab:
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case 0xa6:
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case 0xa7:
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case 0xac:
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case 0xad:
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case 0xae:
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case 0xaf:
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case 0x9b:
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case 0xec:
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case 0xed:
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case 0xee:
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case 0xef:
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case 0xd7:
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case 0x27:
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case 0x2f:
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case 0x37:
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case 0x3f:
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case 0x60:
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case 0x61:
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case 0x6c:
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case 0x6d:
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case 0x6e:
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case 0x6f:
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case 0x98://CBW AL AX Convert Byte to Word
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case 0x99://CWD AX DX Convert Word to Doubleword
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case 0xc9://LEAVE SS:[rSP] eBP High Level Procedure Exit
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case 0x9c://PUSHF Flags SS:[rSP] Push FLAGS Register onto the Stack
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case 0x9d://POPF SS:[rSP] Flags Pop Stack into FLAGS Register
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case 0x06://PUSH ES SS:[rSP] Push Word, Doubleword or Quadword Onto the Stack
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case 0x0e://PUSH CS SS:[rSP] Push Word, Doubleword or Quadword Onto the Stack
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case 0x16://PUSH SS SS:[rSP] Push Word, Doubleword or Quadword Onto the Stack
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case 0x1e://PUSH DS SS:[rSP] Push Word, Doubleword or Quadword Onto the Stack
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case 0x07://POP SS:[rSP] ES Pop a Value from the Stack
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case 0x17://POP SS:[rSP] SS Pop a Value from the Stack
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case 0x1f://POP SS:[rSP] DS Pop a Value from the Stack
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case 0xc3://RETN SS:[rSP] Return from procedure
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case 0xcb://RETF SS:[rSP] Return from procedure
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case 0x90://XCHG Zvqp Exchange Register/Memory with Register
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case 0xcc://INT 3 SS:[rSP] Call to Interrupt Procedure
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case 0xce://INTO eFlags SS:[rSP] Call to Interrupt Procedure
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case 0xcf://IRET SS:[rSP] Flags Interrupt Return
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case 0xf5://CMC Complement Carry Flag
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case 0xf8://CLC Clear Carry Flag
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case 0xf9://STC Set Carry Flag
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case 0xfc://CLD Clear Direction Flag
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case 0xfd://STD Set Direction Flag
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case 0xfa://CLI Clear Interrupt Flag
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case 0xfb://STI Set Interrupt Flag
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case 0x9e://SAHF AH Store AH into Flags
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case 0x9f://LAHF AH Load Status Flags into AH Register
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case 0xf4://HLT Halt
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case 0xa4://MOVS (DS:)[rSI] (ES:)[rDI] Move Data from String to String
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case 0xa5://MOVS DS:[SI] ES:[DI] Move Data from String to String
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case 0xaa://STOS AL (ES:)[rDI] Store String
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case 0xab://STOS AX ES:[DI] Store String
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case 0xa6://CMPS (ES:)[rDI] Compare String Operands
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case 0xa7://CMPS ES:[DI] Compare String Operands
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case 0xac://LODS (DS:)[rSI] AL Load String
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case 0xad://LODS DS:[SI] AX Load String
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case 0xae://SCAS (ES:)[rDI] Scan String
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case 0xaf://SCAS ES:[DI] Scan String
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case 0x9b://FWAIT Check pending unmasked floating-point exceptions
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case 0xec://IN DX AL Input from Port
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case 0xed://IN DX eAX Input from Port
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case 0xee://OUT AL DX Output to Port
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case 0xef://OUT eAX DX Output to Port
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case 0xd7://XLAT (DS:)[rBX+AL] AL Table Look-up Translation
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case 0x27://DAA AL Decimal Adjust AL after Addition
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case 0x2f://DAS AL Decimal Adjust AL after Subtraction
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case 0x37://AAA AL ASCII Adjust After Addition
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case 0x3f://AAS AL ASCII Adjust AL After Subtraction
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case 0x60://PUSHA AX SS:[rSP] Push All General-Purpose Registers
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case 0x61://POPA SS:[rSP] DI Pop All General-Purpose Registers
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case 0x6c://INS DX (ES:)[rDI] Input from Port to String
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case 0x6d://INS DX ES:[DI] Input from Port to String
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case 0x6e://OUTS (DS):[rSI] DX Output String to Port
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case 0x6f://OUTS DS:[SI] DX Output String to Port
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break EXEC_LOOP;
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case 0xb0:
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case 0xb0://MOV Ib Zb Move
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case 0xb1:
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case 0xb2:
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case 0xb3:
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@ -2613,49 +2613,49 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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case 0xb5:
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case 0xb6:
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case 0xb7:
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case 0x04:
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case 0x0c:
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case 0x14:
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case 0x1c:
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case 0x24:
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case 0x2c:
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case 0x34:
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case 0x3c:
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case 0xa8:
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case 0x6a:
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case 0xeb:
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case 0x70:
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case 0x71:
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case 0x72:
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case 0x73:
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case 0x76:
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case 0x77:
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case 0x78:
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case 0x79:
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case 0x7a:
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case 0x7b:
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case 0x7c:
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case 0x7d:
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case 0x7e:
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case 0x7f:
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case 0x74:
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case 0x75:
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case 0xe0:
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case 0xe1:
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case 0xe2:
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case 0xe3:
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case 0xcd:
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case 0xe4:
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case 0xe5:
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case 0xe6:
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case 0xe7:
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case 0xd4:
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case 0xd5:
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case 0x04://ADD Ib AL Add
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case 0x0c://OR Ib AL Logical Inclusive OR
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case 0x14://ADC Ib AL Add with Carry
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case 0x1c://SBB Ib AL Integer Subtraction with Borrow
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case 0x24://AND Ib AL Logical AND
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case 0x2c://SUB Ib AL Subtract
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case 0x34://XOR Ib AL Logical Exclusive OR
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case 0x3c://CMP AL Compare Two Operands
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case 0xa8://TEST AL Logical Compare
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case 0x6a://PUSH Ibss SS:[rSP] Push Word, Doubleword or Quadword Onto the Stack
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case 0xeb://JMP Jbs Jump
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case 0x70://JO Jbs Jump short if overflow (OF=1)
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case 0x71://JNO Jbs Jump short if not overflow (OF=0)
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case 0x72://JB Jbs Jump short if below/not above or equal/carry (CF=1)
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case 0x73://JNB Jbs Jump short if not below/above or equal/not carry (CF=0)
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case 0x76://JBE Jbs Jump short if below or equal/not above (CF=1 AND ZF=1)
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case 0x77://JNBE Jbs Jump short if not below or equal/above (CF=0 AND ZF=0)
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case 0x78://JS Jbs Jump short if sign (SF=1)
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case 0x79://JNS Jbs Jump short if not sign (SF=0)
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case 0x7a://JP Jbs Jump short if parity/parity even (PF=1)
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case 0x7b://JNP Jbs Jump short if not parity/parity odd
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case 0x7c://JL Jbs Jump short if less/not greater (SF!=OF)
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case 0x7d://JNL Jbs Jump short if not less/greater or equal (SF=OF)
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case 0x7e://JLE Jbs Jump short if less or equal/not greater ((ZF=1) OR (SF!=OF))
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case 0x7f://JNLE Jbs Jump short if not less nor equal/greater ((ZF=0) AND (SF=OF))
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case 0x74://JZ Jbs Jump short if zero/equal (ZF=0)
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case 0x75://JNZ Jbs Jump short if not zero/not equal (ZF=1)
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case 0xe0://LOOPNZ Jbs eCX Decrement count; Jump short if count!=0 and ZF=0
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case 0xe1://LOOPZ Jbs eCX Decrement count; Jump short if count!=0 and ZF=1
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case 0xe2://LOOP Jbs eCX Decrement count; Jump short if count!=0
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case 0xe3://JCXZ Jbs Jump short if eCX register is 0
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case 0xcd://INT Ib SS:[rSP] Call to Interrupt Procedure
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case 0xe4://IN Ib AL Input from Port
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case 0xe5://IN Ib eAX Input from Port
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case 0xe6://OUT AL Ib Output to Port
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case 0xe7://OUT eAX Ib Output to Port
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case 0xd4://AAM AL ASCII Adjust AX After Multiply
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case 0xd5://AAD AL ASCII Adjust AX Before Division
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n++;
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if (n > 15)
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abort(6);
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break EXEC_LOOP;
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case 0xb8:
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case 0xb8://MOV Ivqp Zvqp Move
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case 0xb9:
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case 0xba:
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case 0xbb:
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@ -2663,84 +2663,84 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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case 0xbd:
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case 0xbe:
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case 0xbf:
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case 0x05:
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case 0x0d:
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case 0x15:
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case 0x1d:
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case 0x25:
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case 0x2d:
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case 0x35:
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case 0x3d:
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case 0xa9:
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case 0x68:
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case 0xe9:
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case 0xe8:
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case 0x05://ADD Ivds rAX Add
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case 0x0d://OR Ivds rAX Logical Inclusive OR
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case 0x15://ADC Ivds rAX Add with Carry
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case 0x1d://SBB Ivds rAX Integer Subtraction with Borrow
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case 0x25://AND Ivds rAX Logical AND
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case 0x2d://SUB Ivds rAX Subtract
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case 0x35://XOR Ivds rAX Logical Exclusive OR
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case 0x3d://CMP rAX Compare Two Operands
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case 0xa9://TEST rAX Logical Compare
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case 0x68://PUSH Ivs SS:[rSP] Push Word, Doubleword or Quadword Onto the Stack
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case 0xe9://JMP Jvds Jump
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case 0xe8://CALL Jvds SS:[rSP] Call Procedure
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n += stride;
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if (n > 15)
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abort(6);
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break EXEC_LOOP;
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case 0x88:
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case 0x89:
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case 0x8a:
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case 0x8b:
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case 0x86:
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case 0x87:
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case 0x8e:
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case 0x8c:
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case 0xc4:
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case 0xc5:
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case 0x00:
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case 0x08:
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case 0x10:
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case 0x18:
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case 0x20:
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case 0x28:
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case 0x30:
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case 0x38:
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case 0x01:
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case 0x09:
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case 0x11:
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case 0x19:
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case 0x21:
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case 0x29:
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case 0x31:
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case 0x39:
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case 0x02:
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case 0x0a:
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case 0x12:
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case 0x1a:
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case 0x22:
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case 0x2a:
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case 0x32:
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case 0x3a:
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case 0x03:
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case 0x0b:
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case 0x13:
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case 0x1b:
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case 0x23:
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case 0x2b:
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case 0x33:
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case 0x3b:
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case 0x84:
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case 0x85:
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case 0xd0:
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case 0xd1:
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case 0xd2:
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case 0xd3:
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case 0x8f:
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case 0x8d:
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case 0xfe:
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case 0xff:
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case 0xd8:
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case 0xd9:
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case 0xda:
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case 0xdb:
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case 0xdc:
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case 0xdd:
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case 0xde:
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case 0xdf:
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case 0x62:
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case 0x63:
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case 0x88://MOV Gb Eb Move
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case 0x89://MOV Gvqp Evqp Move
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case 0x8a://MOV Eb Gb Move
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case 0x8b://MOV Evqp Gvqp Move
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case 0x86://XCHG Gb Exchange Register/Memory with Register
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case 0x87://XCHG Gvqp Exchange Register/Memory with Register
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case 0x8e://MOV Ew Sw Move
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case 0x8c://MOV Sw Mw Move
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case 0xc4://LES Mp ES Load Far Pointer
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case 0xc5://LDS Mp DS Load Far Pointer
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case 0x00://ADD Gb Eb Add
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case 0x08://OR Gb Eb Logical Inclusive OR
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case 0x10://ADC Gb Eb Add with Carry
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case 0x18://SBB Gb Eb Integer Subtraction with Borrow
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case 0x20://AND Gb Eb Logical AND
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case 0x28://SUB Gb Eb Subtract
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case 0x30://XOR Gb Eb Logical Exclusive OR
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case 0x38://CMP Eb Compare Two Operands
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case 0x01://ADD Gvqp Evqp Add
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case 0x09://OR Gvqp Evqp Logical Inclusive OR
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case 0x11://ADC Gvqp Evqp Add with Carry
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case 0x19://SBB Gvqp Evqp Integer Subtraction with Borrow
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case 0x21://AND Gvqp Evqp Logical AND
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case 0x29://SUB Gvqp Evqp Subtract
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case 0x31://XOR Gvqp Evqp Logical Exclusive OR
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case 0x39://CMP Evqp Compare Two Operands
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case 0x02://ADD Eb Gb Add
|
||||
case 0x0a://OR Eb Gb Logical Inclusive OR
|
||||
case 0x12://ADC Eb Gb Add with Carry
|
||||
case 0x1a://SBB Eb Gb Integer Subtraction with Borrow
|
||||
case 0x22://AND Eb Gb Logical AND
|
||||
case 0x2a://SUB Eb Gb Subtract
|
||||
case 0x32://XOR Eb Gb Logical Exclusive OR
|
||||
case 0x3a://CMP Gb Compare Two Operands
|
||||
case 0x03://ADD Evqp Gvqp Add
|
||||
case 0x0b://OR Evqp Gvqp Logical Inclusive OR
|
||||
case 0x13://ADC Evqp Gvqp Add with Carry
|
||||
case 0x1b://SBB Evqp Gvqp Integer Subtraction with Borrow
|
||||
case 0x23://AND Evqp Gvqp Logical AND
|
||||
case 0x2b://SUB Evqp Gvqp Subtract
|
||||
case 0x33://XOR Evqp Gvqp Logical Exclusive OR
|
||||
case 0x3b://CMP Gvqp Compare Two Operands
|
||||
case 0x84://TEST Eb Logical Compare
|
||||
case 0x85://TEST Evqp Logical Compare
|
||||
case 0xd0://ROL 1 Eb Rotate
|
||||
case 0xd1://ROL 1 Evqp Rotate
|
||||
case 0xd2://ROL CL Eb Rotate
|
||||
case 0xd3://ROL CL Evqp Rotate
|
||||
case 0x8f://POP SS:[rSP] Ev Pop a Value from the Stack
|
||||
case 0x8d://LEA M Gvqp Load Effective Address
|
||||
case 0xfe://INC Eb Increment by 1
|
||||
case 0xff://INC Evqp Increment by 1
|
||||
case 0xd8://FADD Msr ST Add
|
||||
case 0xd9://FLD ESsr ST Load Floating Point Value
|
||||
case 0xda://FIADD Mdi ST Add
|
||||
case 0xdb://FILD Mdi ST Load Integer
|
||||
case 0xdc://FADD Mdr ST Add
|
||||
case 0xdd://FLD Mdr ST Load Floating Point Value
|
||||
case 0xde://FIADD Mwi ST Add
|
||||
case 0xdf://FILD Mwi ST Load Integer
|
||||
case 0x62://BOUND Gv SS:[rSP] Check Array Index Against Bounds
|
||||
case 0x63://ARPL Ew Adjust RPL Field of Segment Selector
|
||||
{
|
||||
{
|
||||
if ((n + 1) > 15)
|
||||
@ -2814,10 +2814,10 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
abort(6);
|
||||
}
|
||||
break EXEC_LOOP;
|
||||
case 0xa0:
|
||||
case 0xa1:
|
||||
case 0xa2:
|
||||
case 0xa3:
|
||||
case 0xa0://MOV Ob AL Move
|
||||
case 0xa1://MOV Ovqp rAX Move
|
||||
case 0xa2://MOV AL Ob Move
|
||||
case 0xa3://MOV rAX Ovqp Move
|
||||
if (CS_flags & 0x0100)
|
||||
n += 2;
|
||||
else
|
||||
@ -2825,13 +2825,13 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
if (n > 15)
|
||||
abort(6);
|
||||
break EXEC_LOOP;
|
||||
case 0xc6:
|
||||
case 0x80:
|
||||
case 0x82:
|
||||
case 0x83:
|
||||
case 0x6b:
|
||||
case 0xc0:
|
||||
case 0xc1:
|
||||
case 0xc6://MOV Ib Eb Move
|
||||
case 0x80://ADD Ib Eb Add
|
||||
case 0x82://ADD Ib Eb Add
|
||||
case 0x83://ADD Ibs Evqp Add
|
||||
case 0x6b://IMUL Evqp Gvqp Signed Multiply
|
||||
case 0xc0://ROL Ib Eb Rotate
|
||||
case 0xc1://ROL Ib Evqp Rotate
|
||||
{
|
||||
{
|
||||
if ((n + 1) > 15)
|
||||
@ -2908,9 +2908,9 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
if (n > 15)
|
||||
abort(6);
|
||||
break EXEC_LOOP;
|
||||
case 0xc7:
|
||||
case 0x81:
|
||||
case 0x69:
|
||||
case 0xc7://MOV Ivds Evqp Move
|
||||
case 0x81://ADD Ivds Evqp Add
|
||||
case 0x69://IMUL Evqp Gvqp Signed Multiply
|
||||
{
|
||||
{
|
||||
if ((n + 1) > 15)
|
||||
@ -2987,7 +2987,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
if (n > 15)
|
||||
abort(6);
|
||||
break EXEC_LOOP;
|
||||
case 0xf6:
|
||||
case 0xf6://TEST Eb Logical Compare
|
||||
{
|
||||
{
|
||||
if ((n + 1) > 15)
|
||||
@ -3067,7 +3067,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
abort(6);
|
||||
}
|
||||
break EXEC_LOOP;
|
||||
case 0xf7:
|
||||
case 0xf7://TEST Evqp Logical Compare
|
||||
{
|
||||
{
|
||||
if ((n + 1) > 15)
|
||||
@ -3147,28 +3147,28 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
abort(6);
|
||||
}
|
||||
break EXEC_LOOP;
|
||||
case 0xea:
|
||||
case 0x9a:
|
||||
case 0xea://JMPF Ap Jump
|
||||
case 0x9a://CALLF Ap SS:[rSP] Call Procedure
|
||||
n += 2 + stride;
|
||||
if (n > 15)
|
||||
abort(6);
|
||||
break EXEC_LOOP;
|
||||
case 0xc2:
|
||||
case 0xca:
|
||||
case 0xc2://RETN SS:[rSP] Return from procedure
|
||||
case 0xca://RETF Iw Return from procedure
|
||||
n += 2;
|
||||
if (n > 15)
|
||||
abort(6);
|
||||
break EXEC_LOOP;
|
||||
case 0xc8:
|
||||
case 0xc8://ENTER Iw SS:[rSP] Make Stack Frame for Procedure Parameters
|
||||
n += 3;
|
||||
if (n > 15)
|
||||
abort(6);
|
||||
break EXEC_LOOP;
|
||||
case 0xd6:
|
||||
case 0xf1:
|
||||
case 0xd6://SALC Undefined and Reserved; Does not Generate #UD
|
||||
case 0xf1://INT1 Undefined and Reserved; Does not Generate #UD
|
||||
default:
|
||||
abort(6);
|
||||
case 0x0f:
|
||||
case 0x0f://two-op instruction prefix
|
||||
{
|
||||
if ((n + 1) > 15)
|
||||
abort(6);
|
||||
@ -3176,14 +3176,14 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
OPbyte = (((last_tlb_val = _tlb_read_[mem8_loc >>> 12]) == -1) ? __ld_8bits_mem8_read() : phys_mem8[mem8_loc ^ last_tlb_val]);
|
||||
}
|
||||
switch (OPbyte) {
|
||||
case 0x06:
|
||||
case 0xa2:
|
||||
case 0x31:
|
||||
case 0xa0:
|
||||
case 0xa8:
|
||||
case 0xa1:
|
||||
case 0xa9:
|
||||
case 0xc8:
|
||||
case 0x06://CLTS CR0 Clear Task-Switched Flag in CR0
|
||||
case 0xa2://CPUID IA32_BIOS_SIGN_ID CPU Identification
|
||||
case 0x31://RDTSC IA32_TIME_STAMP_COUNTER EAX Read Time-Stamp Counter
|
||||
case 0xa0://PUSH FS SS:[rSP] Push Word, Doubleword or Quadword Onto the Stack
|
||||
case 0xa8://PUSH GS SS:[rSP] Push Word, Doubleword or Quadword Onto the Stack
|
||||
case 0xa1://POP SS:[rSP] FS Pop a Value from the Stack
|
||||
case 0xa9://POP SS:[rSP] GS Pop a Value from the Stack
|
||||
case 0xc8://BSWAP Zvqp Byte Swap
|
||||
case 0xc9:
|
||||
case 0xca:
|
||||
case 0xcb:
|
||||
@ -3192,85 +3192,85 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
case 0xce:
|
||||
case 0xcf:
|
||||
break EXEC_LOOP;
|
||||
case 0x80:
|
||||
case 0x81:
|
||||
case 0x82:
|
||||
case 0x83:
|
||||
case 0x84:
|
||||
case 0x85:
|
||||
case 0x86:
|
||||
case 0x87:
|
||||
case 0x88:
|
||||
case 0x89:
|
||||
case 0x8a:
|
||||
case 0x8b:
|
||||
case 0x8c:
|
||||
case 0x8d:
|
||||
case 0x8e:
|
||||
case 0x8f:
|
||||
case 0x80://JO Jvds Jump short if overflow (OF=1)
|
||||
case 0x81://JNO Jvds Jump short if not overflow (OF=0)
|
||||
case 0x82://JB Jvds Jump short if below/not above or equal/carry (CF=1)
|
||||
case 0x83://JNB Jvds Jump short if not below/above or equal/not carry (CF=0)
|
||||
case 0x84://JZ Jvds Jump short if zero/equal (ZF=0)
|
||||
case 0x85://JNZ Jvds Jump short if not zero/not equal (ZF=1)
|
||||
case 0x86://JBE Jvds Jump short if below or equal/not above (CF=1 AND ZF=1)
|
||||
case 0x87://JNBE Jvds Jump short if not below or equal/above (CF=0 AND ZF=0)
|
||||
case 0x88://JS Jvds Jump short if sign (SF=1)
|
||||
case 0x89://JNS Jvds Jump short if not sign (SF=0)
|
||||
case 0x8a://JP Jvds Jump short if parity/parity even (PF=1)
|
||||
case 0x8b://JNP Jvds Jump short if not parity/parity odd
|
||||
case 0x8c://JL Jvds Jump short if less/not greater (SF!=OF)
|
||||
case 0x8d://JNL Jvds Jump short if not less/greater or equal (SF=OF)
|
||||
case 0x8e://JLE Jvds Jump short if less or equal/not greater ((ZF=1) OR (SF!=OF))
|
||||
case 0x8f://JNLE Jvds Jump short if not less nor equal/greater ((ZF=0) AND (SF=OF))
|
||||
n += stride;
|
||||
if (n > 15)
|
||||
abort(6);
|
||||
break EXEC_LOOP;
|
||||
case 0x90:
|
||||
case 0x91:
|
||||
case 0x92:
|
||||
case 0x93:
|
||||
case 0x94:
|
||||
case 0x95:
|
||||
case 0x96:
|
||||
case 0x97:
|
||||
case 0x98:
|
||||
case 0x99:
|
||||
case 0x9a:
|
||||
case 0x9b:
|
||||
case 0x9c:
|
||||
case 0x9d:
|
||||
case 0x9e:
|
||||
case 0x9f:
|
||||
case 0x40:
|
||||
case 0x41:
|
||||
case 0x42:
|
||||
case 0x43:
|
||||
case 0x44:
|
||||
case 0x45:
|
||||
case 0x46:
|
||||
case 0x47:
|
||||
case 0x48:
|
||||
case 0x49:
|
||||
case 0x4a:
|
||||
case 0x4b:
|
||||
case 0x4c:
|
||||
case 0x4d:
|
||||
case 0x4e:
|
||||
case 0x4f:
|
||||
case 0xb6:
|
||||
case 0xb7:
|
||||
case 0xbe:
|
||||
case 0xbf:
|
||||
case 0x00:
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
case 0x03:
|
||||
case 0x20:
|
||||
case 0x22:
|
||||
case 0x23:
|
||||
case 0xb2:
|
||||
case 0xb4:
|
||||
case 0xb5:
|
||||
case 0xa5:
|
||||
case 0xad:
|
||||
case 0xa3:
|
||||
case 0xab:
|
||||
case 0xb3:
|
||||
case 0xbb:
|
||||
case 0xbc:
|
||||
case 0xbd:
|
||||
case 0xaf:
|
||||
case 0xc0:
|
||||
case 0xc1:
|
||||
case 0xb0:
|
||||
case 0xb1:
|
||||
case 0x90://SETO Eb Set Byte on Condition - overflow (OF=1)
|
||||
case 0x91://SETNO Eb Set Byte on Condition - not overflow (OF=0)
|
||||
case 0x92://SETB Eb Set Byte on Condition - below/not above or equal/carry (CF=1)
|
||||
case 0x93://SETNB Eb Set Byte on Condition - not below/above or equal/not carry (CF=0)
|
||||
case 0x94://SETZ Eb Set Byte on Condition - zero/equal (ZF=0)
|
||||
case 0x95://SETNZ Eb Set Byte on Condition - not zero/not equal (ZF=1)
|
||||
case 0x96://SETBE Eb Set Byte on Condition - below or equal/not above (CF=1 AND ZF=1)
|
||||
case 0x97://SETNBE Eb Set Byte on Condition - not below or equal/above (CF=0 AND ZF=0)
|
||||
case 0x98://SETS Eb Set Byte on Condition - sign (SF=1)
|
||||
case 0x99://SETNS Eb Set Byte on Condition - not sign (SF=0)
|
||||
case 0x9a://SETP Eb Set Byte on Condition - parity/parity even (PF=1)
|
||||
case 0x9b://SETNP Eb Set Byte on Condition - not parity/parity odd
|
||||
case 0x9c://SETL Eb Set Byte on Condition - less/not greater (SF!=OF)
|
||||
case 0x9d://SETNL Eb Set Byte on Condition - not less/greater or equal (SF=OF)
|
||||
case 0x9e://SETLE Eb Set Byte on Condition - less or equal/not greater ((ZF=1) OR (SF!=OF))
|
||||
case 0x9f://SETNLE Eb Set Byte on Condition - not less nor equal/greater ((ZF=0) AND (SF=OF))
|
||||
case 0x40://CMOVO Evqp Gvqp Conditional Move - overflow (OF=1)
|
||||
case 0x41://CMOVNO Evqp Gvqp Conditional Move - not overflow (OF=0)
|
||||
case 0x42://CMOVB Evqp Gvqp Conditional Move - below/not above or equal/carry (CF=1)
|
||||
case 0x43://CMOVNB Evqp Gvqp Conditional Move - not below/above or equal/not carry (CF=0)
|
||||
case 0x44://CMOVZ Evqp Gvqp Conditional Move - zero/equal (ZF=0)
|
||||
case 0x45://CMOVNZ Evqp Gvqp Conditional Move - not zero/not equal (ZF=1)
|
||||
case 0x46://CMOVBE Evqp Gvqp Conditional Move - below or equal/not above (CF=1 AND ZF=1)
|
||||
case 0x47://CMOVNBE Evqp Gvqp Conditional Move - not below or equal/above (CF=0 AND ZF=0)
|
||||
case 0x48://CMOVS Evqp Gvqp Conditional Move - sign (SF=1)
|
||||
case 0x49://CMOVNS Evqp Gvqp Conditional Move - not sign (SF=0)
|
||||
case 0x4a://CMOVP Evqp Gvqp Conditional Move - parity/parity even (PF=1)
|
||||
case 0x4b://CMOVNP Evqp Gvqp Conditional Move - not parity/parity odd
|
||||
case 0x4c://CMOVL Evqp Gvqp Conditional Move - less/not greater (SF!=OF)
|
||||
case 0x4d://CMOVNL Evqp Gvqp Conditional Move - not less/greater or equal (SF=OF)
|
||||
case 0x4e://CMOVLE Evqp Gvqp Conditional Move - less or equal/not greater ((ZF=1) OR (SF!=OF))
|
||||
case 0x4f://CMOVNLE Evqp Gvqp Conditional Move - not less nor equal/greater ((ZF=0) AND (SF=OF))
|
||||
case 0xb6://MOVZX Eb Gvqp Move with Zero-Extend
|
||||
case 0xb7://MOVZX Ew Gvqp Move with Zero-Extend
|
||||
case 0xbe://MOVSX Eb Gvqp Move with Sign-Extension
|
||||
case 0xbf://MOVSX Ew Gvqp Move with Sign-Extension
|
||||
case 0x00://SLDT LDTR Mw Store Local Descriptor Table Register
|
||||
case 0x01://SGDT GDTR Ms Store Global Descriptor Table Register
|
||||
case 0x02://LAR Mw Gvqp Load Access Rights Byte
|
||||
case 0x03://LSL Mw Gvqp Load Segment Limit
|
||||
case 0x20://MOV Cd Rd Move to/from Control Registers
|
||||
case 0x22://MOV Rd Cd Move to/from Control Registers
|
||||
case 0x23://MOV Rd Dd Move to/from Debug Registers
|
||||
case 0xb2://LSS Mptp SS Load Far Pointer
|
||||
case 0xb4://LFS Mptp FS Load Far Pointer
|
||||
case 0xb5://LGS Mptp GS Load Far Pointer
|
||||
case 0xa5://SHLD Gvqp Evqp Double Precision Shift Left
|
||||
case 0xad://SHRD Gvqp Evqp Double Precision Shift Right
|
||||
case 0xa3://BT Evqp Bit Test
|
||||
case 0xab://BTS Gvqp Evqp Bit Test and Set
|
||||
case 0xb3://BTR Gvqp Evqp Bit Test and Reset
|
||||
case 0xbb://BTC Gvqp Evqp Bit Test and Complement
|
||||
case 0xbc://BSF Evqp Gvqp Bit Scan Forward
|
||||
case 0xbd://BSR Evqp Gvqp Bit Scan Reverse
|
||||
case 0xaf://IMUL Evqp Gvqp Signed Multiply
|
||||
case 0xc0://XADD Eb Exchange and Add
|
||||
case 0xc1://XADD Evqp Exchange and Add
|
||||
case 0xb0://CMPXCHG Gb Eb Compare and Exchange
|
||||
case 0xb1://CMPXCHG Gvqp Evqp Compare and Exchange
|
||||
{
|
||||
{
|
||||
if ((n + 1) > 15)
|
||||
@ -3344,9 +3344,9 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
abort(6);
|
||||
}
|
||||
break EXEC_LOOP;
|
||||
case 0xa4:
|
||||
case 0xac:
|
||||
case 0xba:
|
||||
case 0xa4://SHLD Gvqp Evqp Double Precision Shift Left
|
||||
case 0xac://SHRD Gvqp Evqp Double Precision Shift Right
|
||||
case 0xba://BT Evqp Bit Test
|
||||
{
|
||||
{
|
||||
if ((n + 1) > 15)
|
||||
@ -3424,120 +3424,120 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
|
||||
abort(6);
|
||||
break EXEC_LOOP;
|
||||
case 0x04:
|
||||
case 0x05:
|
||||
case 0x07:
|
||||
case 0x08:
|
||||
case 0x09:
|
||||
case 0x05://LOADALL AX Load All of the CPU Registers
|
||||
case 0x07://LOADALL EAX Load All of the CPU Registers
|
||||
case 0x08://INVD Invalidate Internal Caches
|
||||
case 0x09://WBINVD Write Back and Invalidate Cache
|
||||
case 0x0a:
|
||||
case 0x0b:
|
||||
case 0x0b://UD2 Undefined Instruction
|
||||
case 0x0c:
|
||||
case 0x0d:
|
||||
case 0x0d://NOP Ev No Operation
|
||||
case 0x0e:
|
||||
case 0x0f:
|
||||
case 0x10:
|
||||
case 0x11:
|
||||
case 0x12:
|
||||
case 0x13:
|
||||
case 0x14:
|
||||
case 0x15:
|
||||
case 0x16:
|
||||
case 0x17:
|
||||
case 0x18:
|
||||
case 0x19:
|
||||
case 0x1a:
|
||||
case 0x1b:
|
||||
case 0x1c:
|
||||
case 0x1d:
|
||||
case 0x1e:
|
||||
case 0x1f:
|
||||
case 0x21:
|
||||
case 0x24:
|
||||
case 0x10://MOVUPS Wps Vps Move Unaligned Packed Single-FP Values
|
||||
case 0x11://MOVUPS Vps Wps Move Unaligned Packed Single-FP Values
|
||||
case 0x12://MOVHLPS Uq Vq Move Packed Single-FP Values High to Low
|
||||
case 0x13://MOVLPS Vq Mq Move Low Packed Single-FP Values
|
||||
case 0x14://UNPCKLPS Wq Vps Unpack and Interleave Low Packed Single-FP Values
|
||||
case 0x15://UNPCKHPS Wq Vps Unpack and Interleave High Packed Single-FP Values
|
||||
case 0x16://MOVLHPS Uq Vq Move Packed Single-FP Values Low to High
|
||||
case 0x17://MOVHPS Vq Mq Move High Packed Single-FP Values
|
||||
case 0x18://HINT_NOP Ev Hintable NOP
|
||||
case 0x19://HINT_NOP Ev Hintable NOP
|
||||
case 0x1a://HINT_NOP Ev Hintable NOP
|
||||
case 0x1b://HINT_NOP Ev Hintable NOP
|
||||
case 0x1c://HINT_NOP Ev Hintable NOP
|
||||
case 0x1d://HINT_NOP Ev Hintable NOP
|
||||
case 0x1e://HINT_NOP Ev Hintable NOP
|
||||
case 0x1f://HINT_NOP Ev Hintable NOP
|
||||
case 0x21://MOV Dd Rd Move to/from Debug Registers
|
||||
case 0x24://MOV Td Rd Move to/from Test Registers
|
||||
case 0x25:
|
||||
case 0x26:
|
||||
case 0x26://MOV Rd Td Move to/from Test Registers
|
||||
case 0x27:
|
||||
case 0x28:
|
||||
case 0x29:
|
||||
case 0x2a:
|
||||
case 0x2b:
|
||||
case 0x2c:
|
||||
case 0x2d:
|
||||
case 0x2e:
|
||||
case 0x2f:
|
||||
case 0x30:
|
||||
case 0x32:
|
||||
case 0x33:
|
||||
case 0x34:
|
||||
case 0x35:
|
||||
case 0x28://MOVAPS Wps Vps Move Aligned Packed Single-FP Values
|
||||
case 0x29://MOVAPS Vps Wps Move Aligned Packed Single-FP Values
|
||||
case 0x2a://CVTPI2PS Qpi Vps Convert Packed DW Integers to1.11 PackedSingle-FP Values
|
||||
case 0x2b://MOVNTPS Vps Mps Store Packed Single-FP Values Using Non-Temporal Hint
|
||||
case 0x2c://CVTTPS2PI Wpsq Ppi Convert with Trunc. Packed Single-FP Values to1.11 PackedDW Integers
|
||||
case 0x2d://CVTPS2PI Wpsq Ppi Convert Packed Single-FP Values to1.11 PackedDW Integers
|
||||
case 0x2e://UCOMISS Vss Unordered Compare Scalar Single-FP Values and Set EFLAGS
|
||||
case 0x2f://COMISS Vss Compare Scalar Ordered Single-FP Values and Set EFLAGS
|
||||
case 0x30://WRMSR rCX MSR Write to Model Specific Register
|
||||
case 0x32://RDMSR rCX rAX Read from Model Specific Register
|
||||
case 0x33://RDPMC PMC EAX Read Performance-Monitoring Counters
|
||||
case 0x34://SYSENTER IA32_SYSENTER_CS SS Fast System Call
|
||||
case 0x35://SYSEXIT IA32_SYSENTER_CS SS Fast Return from Fast System Call
|
||||
case 0x36:
|
||||
case 0x37:
|
||||
case 0x38:
|
||||
case 0x37://GETSEC EAX GETSEC Leaf Functions
|
||||
case 0x38://PSHUFB Qq Pq Packed Shuffle Bytes
|
||||
case 0x39:
|
||||
case 0x3a:
|
||||
case 0x3a://ROUNDPS Wps Vps Round Packed Single-FP Values
|
||||
case 0x3b:
|
||||
case 0x3c:
|
||||
case 0x3d:
|
||||
case 0x3e:
|
||||
case 0x3f:
|
||||
case 0x50:
|
||||
case 0x51:
|
||||
case 0x52:
|
||||
case 0x53:
|
||||
case 0x54:
|
||||
case 0x55:
|
||||
case 0x56:
|
||||
case 0x57:
|
||||
case 0x58:
|
||||
case 0x59:
|
||||
case 0x5a:
|
||||
case 0x5b:
|
||||
case 0x5c:
|
||||
case 0x5d:
|
||||
case 0x5e:
|
||||
case 0x5f:
|
||||
case 0x60:
|
||||
case 0x61:
|
||||
case 0x62:
|
||||
case 0x63:
|
||||
case 0x64:
|
||||
case 0x65:
|
||||
case 0x66:
|
||||
case 0x67:
|
||||
case 0x68:
|
||||
case 0x69:
|
||||
case 0x6a:
|
||||
case 0x6b:
|
||||
case 0x6c:
|
||||
case 0x6d:
|
||||
case 0x6e:
|
||||
case 0x6f:
|
||||
case 0x70:
|
||||
case 0x71:
|
||||
case 0x72:
|
||||
case 0x73:
|
||||
case 0x74:
|
||||
case 0x75:
|
||||
case 0x76:
|
||||
case 0x77:
|
||||
case 0x78:
|
||||
case 0x79:
|
||||
case 0x50://MOVMSKPS Ups Gdqp Extract Packed Single-FP Sign Mask
|
||||
case 0x51://SQRTPS Wps Vps Compute Square Roots of Packed Single-FP Values
|
||||
case 0x52://RSQRTPS Wps Vps Compute Recipr. of Square Roots of Packed Single-FP Values
|
||||
case 0x53://RCPPS Wps Vps Compute Reciprocals of Packed Single-FP Values
|
||||
case 0x54://ANDPS Wps Vps Bitwise Logical AND of Packed Single-FP Values
|
||||
case 0x55://ANDNPS Wps Vps Bitwise Logical AND NOT of Packed Single-FP Values
|
||||
case 0x56://ORPS Wps Vps Bitwise Logical OR of Single-FP Values
|
||||
case 0x57://XORPS Wps Vps Bitwise Logical XOR for Single-FP Values
|
||||
case 0x58://ADDPS Wps Vps Add Packed Single-FP Values
|
||||
case 0x59://MULPS Wps Vps Multiply Packed Single-FP Values
|
||||
case 0x5a://CVTPS2PD Wps Vpd Convert Packed Single-FP Values to1.11 PackedDouble-FP Values
|
||||
case 0x5b://CVTDQ2PS Wdq Vps Convert Packed DW Integers to1.11 PackedSingle-FP Values
|
||||
case 0x5c://SUBPS Wps Vps Subtract Packed Single-FP Values
|
||||
case 0x5d://MINPS Wps Vps Return Minimum Packed Single-FP Values
|
||||
case 0x5e://DIVPS Wps Vps Divide Packed Single-FP Values
|
||||
case 0x5f://MAXPS Wps Vps Return Maximum Packed Single-FP Values
|
||||
case 0x60://PUNPCKLBW Qd Pq Unpack Low Data
|
||||
case 0x61://PUNPCKLWD Qd Pq Unpack Low Data
|
||||
case 0x62://PUNPCKLDQ Qd Pq Unpack Low Data
|
||||
case 0x63://PACKSSWB Qd Pq Pack with Signed Saturation
|
||||
case 0x64://PCMPGTB Qd Pq Compare Packed Signed Integers for Greater Than
|
||||
case 0x65://PCMPGTW Qd Pq Compare Packed Signed Integers for Greater Than
|
||||
case 0x66://PCMPGTD Qd Pq Compare Packed Signed Integers for Greater Than
|
||||
case 0x67://PACKUSWB Qq Pq Pack with Unsigned Saturation
|
||||
case 0x68://PUNPCKHBW Qq Pq Unpack High Data
|
||||
case 0x69://PUNPCKHWD Qq Pq Unpack High Data
|
||||
case 0x6a://PUNPCKHDQ Qq Pq Unpack High Data
|
||||
case 0x6b://PACKSSDW Qq Pq Pack with Signed Saturation
|
||||
case 0x6c://PUNPCKLQDQ Wdq Vdq Unpack Low Data
|
||||
case 0x6d://PUNPCKHQDQ Wdq Vdq Unpack High Data
|
||||
case 0x6e://MOVD Ed Pq Move Doubleword
|
||||
case 0x6f://MOVQ Qq Pq Move Quadword
|
||||
case 0x70://PSHUFW Qq Pq Shuffle Packed Words
|
||||
case 0x71://PSRLW Ib Nq Shift Packed Data Right Logical
|
||||
case 0x72://PSRLD Ib Nq Shift Double Quadword Right Logical
|
||||
case 0x73://PSRLQ Ib Nq Shift Packed Data Right Logical
|
||||
case 0x74://PCMPEQB Qq Pq Compare Packed Data for Equal
|
||||
case 0x75://PCMPEQW Qq Pq Compare Packed Data for Equal
|
||||
case 0x76://PCMPEQD Qq Pq Compare Packed Data for Equal
|
||||
case 0x77://EMMS Empty MMX Technology State
|
||||
case 0x78://VMREAD Gd Ed Read Field from Virtual-Machine Control Structure
|
||||
case 0x79://VMWRITE Gd Write Field to Virtual-Machine Control Structure
|
||||
case 0x7a:
|
||||
case 0x7b:
|
||||
case 0x7c:
|
||||
case 0x7d:
|
||||
case 0x7e:
|
||||
case 0x7f:
|
||||
case 0x7c://HADDPD Wpd Vpd Packed Double-FP Horizontal Add
|
||||
case 0x7d://HSUBPD Wpd Vpd Packed Double-FP Horizontal Subtract
|
||||
case 0x7e://MOVD Pq Ed Move Doubleword
|
||||
case 0x7f://MOVQ Pq Qq Move Quadword
|
||||
case 0xa6:
|
||||
case 0xa7:
|
||||
case 0xaa:
|
||||
case 0xae:
|
||||
case 0xb8:
|
||||
case 0xb9:
|
||||
case 0xc2:
|
||||
case 0xc3:
|
||||
case 0xc4:
|
||||
case 0xc5:
|
||||
case 0xc6:
|
||||
case 0xc7:
|
||||
case 0xaa://RSM Flags Resume from System Management Mode
|
||||
case 0xae://FXSAVE ST Mstx Save x87 FPU, MMX, XMM, and MXCSR State
|
||||
case 0xb8://JMPE Jump to IA-64 Instruction Set
|
||||
case 0xb9://UD G Undefined Instruction
|
||||
case 0xc2://CMPPS Wps Vps Compare Packed Single-FP Values
|
||||
case 0xc3://MOVNTI Gdqp Mdqp Store Doubleword Using Non-Temporal Hint
|
||||
case 0xc4://PINSRW Rdqp Pq Insert Word
|
||||
case 0xc5://PEXTRW Nq Gdqp Extract Word
|
||||
case 0xc6://SHUFPS Wps Vps Shuffle Packed Single-FP Values
|
||||
case 0xc7://CMPXCHG8B EBX Mq Compare and Exchange Bytes
|
||||
default:
|
||||
abort(6);
|
||||
}
|
||||
|
||||
@ -67,19 +67,29 @@ outfile.close()
|
||||
|
||||
# now transform source file --------------------------------------------------------------------------------
|
||||
|
||||
# - for weird exec counting function
|
||||
caseline = re.compile("( case )(0x[0-9a-f]+):.*")
|
||||
def strip_1(str):
|
||||
return str
|
||||
onebyte_start = 3176
|
||||
twobyte_start = 3177
|
||||
twobyte_end = 3546
|
||||
|
||||
# - for normal instruction format: 0xXX
|
||||
#caseline = re.compile("(\s+case )(0x[0-9a-f]+):.*")
|
||||
#def strip_1(str):
|
||||
# return str
|
||||
#onebyte_start = 5662
|
||||
#twobyte_start = 7551
|
||||
#twobyte_end = 8291
|
||||
|
||||
# - for 16bit compat instruction format: 0x1XX
|
||||
caseline = re.compile("(\s+case )(0x1[0-9a-f]+):.*")
|
||||
def strip_1(str):
|
||||
return "0x"+str[-2:]
|
||||
onebyte_start = 8472
|
||||
twobyte_start = 9245
|
||||
twobyte_end = 9647
|
||||
#caseline = re.compile("(\s+case )(0x1[0-9a-f]+):.*")
|
||||
#def strip_1(str):
|
||||
# return "0x"+str[-2:]
|
||||
#onebyte_start = 8472
|
||||
#twobyte_start = 9245
|
||||
#twobyte_end = 9647
|
||||
|
||||
emulatorlines = open("cpux86-ta.js","r").readlines()
|
||||
newlines=[]
|
||||
|
||||
Loading…
Reference in New Issue
Block a user