Merge pull request #10 from danluu/master
More documentation for obscure functions
This commit is contained in:
Anselm Levskaya
commit
1fa83c912a
64
cpux86-ta.js
64
cpux86-ta.js
@ -3715,7 +3715,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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ke = ld16_mem8_kernel_read();
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return [ke, le];
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}
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function do_interrupt_paged_mode(intno, ne, error_code, oe, pe) {
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function do_interrupt_protected_mode(intno, ne, error_code, oe, pe) {
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var descriptor_table, qe, descriptor_type, he, selector, re, cpl_var;
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var te, ue, is_32_bit;
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var e, descriptor_low4bytes, descriptor_high4bytes, ve, ke, le, we, xe;
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@ -3954,7 +3954,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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}
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cpu.eflags &= ~(0x00000100 | 0x00020000 | 0x00010000 | 0x00004000);
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}
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function do_interrupt_not_paged_mode(intno, ne, error_code, oe, pe) {
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function do_interrupt_not_protected_mode(intno, ne, error_code, oe, pe) {
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var descriptor_table, qe, selector, ve, le, ye;
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descriptor_table = cpu.idt;
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if (intno * 4 + 3 > descriptor_table.limit)
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@ -4015,9 +4015,9 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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}
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}
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if (cpu.cr0 & (1 << 0)) {
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do_interrupt_paged_mode(intno, ne, error_code, oe, pe);
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do_interrupt_protected_mode(intno, ne, error_code, oe, pe);
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} else {
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do_interrupt_not_paged_mode(intno, ne, error_code, oe, pe);
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do_interrupt_not_protected_mode(intno, ne, error_code, oe, pe);
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}
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}
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//SLDT routines
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@ -4188,7 +4188,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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}
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}
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/* used only in do_return_paged_mode */
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/* used only in do_return_protected_mode */
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function Pe(register, cpl_var) {
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var dpl, descriptor_high4bytes;
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if ((register == 4 || register == 5) && (cpu.segs[register].selector & 0xfffc) == 0)
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@ -4202,7 +4202,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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}
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}
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function op_CALLF_not_paged_mode(is_32_bit, selector, Le, oe) {
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function op_CALLF_not_protected_mode(is_32_bit, selector, Le, oe) {
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var le;
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le = regs[4];
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if (is_32_bit) {
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@ -4234,7 +4234,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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cpu.segs[1].base = (selector << 4);
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init_segment_local_vars();
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}
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function op_CALLF_paged_mode(is_32_bit, selector, Le, oe) {
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function op_CALLF_protected_mode(is_32_bit, selector, Le, oe) {
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var ue, i, e;
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var descriptor_low4bytes, descriptor_high4bytes, cpl_var, dpl, rpl, selector, ve, Se;
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var ke, we, xe, esp, descriptor_type, re, SS_mask;
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@ -4444,12 +4444,12 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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}
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function op_CALLF(is_32_bit, selector, Le, oe) {
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if (!(cpu.cr0 & (1 << 0)) || (cpu.eflags & 0x00020000)) {
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op_CALLF_not_paged_mode(is_32_bit, selector, Le, oe);
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op_CALLF_not_protected_mode(is_32_bit, selector, Le, oe);
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} else {
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op_CALLF_paged_mode(is_32_bit, selector, Le, oe);
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op_CALLF_protected_mode(is_32_bit, selector, Le, oe);
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}
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}
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function do_return_not_paged_mode(is_32_bit, is_iret, imm16) {
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function do_return_not_protected_mode(is_32_bit, is_iret, imm16) {
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var esp, selector, stack_eip, stack_eflags, SS_mask, qe, ef;
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SS_mask = 0xffff;
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esp = regs[4];
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@ -4503,7 +4503,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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}
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init_segment_local_vars();
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}
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function do_return_paged_mode(is_32_bit, is_iret, imm16) {
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function do_return_protected_mode(is_32_bit, is_iret, imm16) {
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var selector, stack_eflags, gf;
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var hf, jf, kf, lf;
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var e, descriptor_low4bytes, descriptor_high4bytes, we, xe;
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@ -4695,20 +4695,20 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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if (iopl != 3)
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abort(13);
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}
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do_return_not_paged_mode(is_32_bit, 1, 0);
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do_return_not_protected_mode(is_32_bit, 1, 0);
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} else {
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if (cpu.eflags & 0x00004000) {
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throw "unsupported task gate";
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} else {
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do_return_paged_mode(is_32_bit, 1, 0);
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do_return_protected_mode(is_32_bit, 1, 0);
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}
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}
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}
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function op_RETF(is_32_bit, imm16) {
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if (!(cpu.cr0 & (1 << 0)) || (cpu.eflags & 0x00020000)) {
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do_return_not_paged_mode(is_32_bit, 0, imm16);
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do_return_not_protected_mode(is_32_bit, 0, imm16);
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} else {
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do_return_paged_mode(is_32_bit, 0, imm16);
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do_return_protected_mode(is_32_bit, 0, imm16);
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}
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}
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@ -4787,7 +4787,7 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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}
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//utility function for op_VERR_VERW
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function rf(selector, ud) {
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function segment_isnt_accessible(selector, is_verw) {
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var e, descriptor_low4bytes, descriptor_high4bytes, rpl, dpl, cpl_var;
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if ((selector & 0xfffc) == 0)
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return 0;
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@ -4796,13 +4796,13 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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return 0;
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descriptor_low4bytes = e[0];
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descriptor_high4bytes = e[1];
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if (!(descriptor_high4bytes & (1 << 12)))
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if (!(descriptor_high4bytes & (1 << 12))) // s bit (system == 0)
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return 0;
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rpl = selector & 3;
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dpl = (descriptor_high4bytes >> 13) & 3;
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cpl_var = cpu.cpl;
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if (descriptor_high4bytes & (1 << 11)) {
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if (ud) {
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if (descriptor_high4bytes & (1 << 11)) { // code == 1, data == 0
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if (is_verw) { // code segments are never writable
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return 0;
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} else {
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if (!(descriptor_high4bytes & (1 << 9)))
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@ -4813,17 +4813,19 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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}
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}
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} else {
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if (dpl < cpl_var || dpl < rpl)
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if (dpl < cpl_var || dpl < rpl) // data segments are always readable, if privilege is sufficient
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return 0;
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if (ud && !(descriptor_high4bytes & (1 << 9)))
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if (is_verw && !(descriptor_high4bytes & (1 << 9))) //writable data segment
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return 0;
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}
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return 1;
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}
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function op_VERR_VERW(selector, ud) {
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function op_VERR_VERW(selector, is_verw) {
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var z;
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z = rf(selector, ud);
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z = segment_isnt_accessible(selector, is_verw);
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_src = get_conditional_flags();
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// clear eflags.zf if selector is accessible and (readable (for VERR) or writable (for VERW))
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if (z)
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_src |= 0x0040;
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else
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@ -4860,21 +4862,21 @@ CPU_X86.prototype.exec_internal = function(N_cycles, interrupt) {
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_op = 24;
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}
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function op_CPUID() {
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var Rb;
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Rb = regs[0];
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switch (Rb) {
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case 0:
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var eax;
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eax = regs[0];
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switch (eax) {
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case 0: // eax == 0: vendor ID
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regs[0] = 1;
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regs[3] = 0x756e6547 & -1;
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regs[2] = 0x49656e69 & -1;
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regs[1] = 0x6c65746e & -1;
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break;
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case 1:
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case 1: // eax == 1: processor info and feature flags
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default:
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regs[0] = (5 << 8) | (4 << 4) | 3;
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regs[3] = 8 << 8;
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regs[0] = (5 << 8) | (4 << 4) | 3; // family | model | stepping
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regs[3] = 8 << 8; // danluu: This is a mystery to me. This bit now indicates clflush line size, but must have meant something else in the past.
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regs[1] = 0;
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regs[2] = (1 << 4);
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regs[2] = (1 << 4); // rdtsc support
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break;
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}
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}
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@ -25,6 +25,8 @@ have been added.
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The core opcode execution loop has been autocommented to indicate what
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instruction operation the opcode refers to.
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One mystery is, why does CPUID(1) return 8 << 8 in EBX? EBX[15:8] is now used to indicate CLFLUSH line size, but that field must have been used for something else in the past.
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### ETC
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I highly recommend, by the way, the excellent [JSShaper][2] library for transforming large javascript code bases. The hacks I made from it are in this repo: a little symbol-name-transformer node.js script and an emacs function for doing this in live buffers.
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